sim-pipe.h

自己写的c语言版的软件实现cpu的pipeline功能的程序。对于学习体系结构的同仁有好处。

#include "machine.h"

/*define buffer between fetch and decode stage*/
struct ifid {
	md_inst_t inst;	//instruction that has been fetched
	md_addr_t PC;	//pc value of current instruction
};

/*define buffer between decode and execute stage*/
struct idex {
	md_addr_t PC;
	int shamt;		//move bits number 
	int opcode;		//operation number
	int rsValue;		//value of rs read from rs reg
	int rtValue;		//value of rt read from rt reg
	int rt;			//rt register number
	int rd;			//rd register number
	int branchaddress;		//address of branch
	int targ;			//jump target
	int signal_regdst;		//signal to show which is destination
	int signal_alusrca;		//decide which is A's value 
	int signal_alusrcb;		//whether source of B is a register value
	int signal_memread;	//signal to show whether need to read memory
	int signal_memtoreg;	//value from memory to register
};

/*define buffer between execute and memory stage*/
struct exmem {
	md_addr_t PC;
	int whetherjump;		//1 means two values are equal, 0 means not
	int result;			//value got after alu execution
	int rtValue;		//value to be stored
	int regDst;		//destination register number
	int signal_branch;		//whether there is a branch
	int signal_memwrite;	//whether memory will be written
	int signal_memread;	//whether memory will be read
	int signal_regwrite;		//whether register will be written
	int signal_memtoreg;	//whether register value is from memory
};

/*define buffer between memory and writeback stage*/
struct memwb {
	int value;			//value read from memory
	int result;			//alu result
	int regDst;		//destination register
	int signal_memtoreg;	
	int signal_regwrite;
};

/*do fetch-decode stage*/
void do_ifid();

/*do decode-execute stage*/
void do_idex();

/*do execute-memory stage*/
void do_exmem();

/*do memory-writeback stage*/
void do_memwb();

/*write back to register*/
void writeback();

#define MD_FETCH_INSTI(INST, MEM, PC)					\
  { INST.a = MEM_READ_WORD(mem, (PC));					\
    INST.b = MEM_READ_WORD(mem, (PC) + sizeof(word_t)); }

#define SET_OPCODE(OP, INST) ((OP) = ((INST).a & 0xff)) 

#define RSI(INST)		(INST.b >> 24& 0xff)		/* reg source #1 */
#define RTI(INST)		((INST.b >> 16) & 0xff)		/* reg source #2 */
#define RDI(INST)		((INST.b >> 8) & 0xff)		/* reg dest */

#define IMMI(INST)	((int)((/* signed */short)(INST.b & 0xffff)))	/*get immediate value*/
#define TARGI(INST)	(INST.b & 0x3ffffff)		/*jump target*/