filter.sim.rpt

FPGA开发光盘各章节实例的设计工程与源码

; |filter|accumulator:shift_add|flip[14]                                                                                     ; |filter|accumulator:shift_add|flip[14]                                                                                     ; regout           ;
; |filter|accumulator:shift_add|flip[15]                                                                                     ; |filter|accumulator:shift_add|flip[15]                                                                                     ; regout           ;
; |filter|accumulator:shift_add|flip[16]                                                                                     ; |filter|accumulator:shift_add|flip[16]                                                                                     ; regout           ;
; |filter|accumulator:shift_add|flip[17]                                                                                     ; |filter|accumulator:shift_add|flip[17]                                                                                     ; regout           ;
; |filter|accumulator:shift_add|flip[18]                                                                                     ; |filter|accumulator:shift_add|flip[18]                                                                                     ; regout           ;
; |filter|accumulator:shift_add|accum[2]                                                                                     ; |filter|accumulator:shift_add|accum[2]~COMBOUT                                                                             ; combout          ;
; |filter|accumulator:shift_add|accum[2]                                                                                     ; |filter|accumulator:shift_add|accum[2]                                                                                     ; regout           ;
; |filter|accumulator:shift_add|accum[3]                                                                                     ; |filter|accumulator:shift_add|accum[3]~COMBOUT                                                                             ; combout          ;
; |filter|accumulator:shift_add|accum[3]                                                                                     ; |filter|accumulator:shift_add|accum[3]                                                                                     ; regout           ;
; |filter|accumulator:shift_add|accum[4]                                                                                     ; |filter|accumulator:shift_add|accum[4]~COMBOUT                                                                             ; combout          ;
; |filter|accumulator:shift_add|accum[4]                                                                                     ; |filter|accumulator:shift_add|accum[4]                                                                                     ; regout           ;
; |filter|accumulator:shift_add|accum[5]                                                                                     ; |filter|accumulator:shift_add|accum[5]~COMBOUT                                                                             ; combout          ;
; |filter|accumulator:shift_add|accum[5]                                                                                     ; |filter|accumulator:shift_add|accum[5]                                                                                     ; regout           ;
; |filter|accumulator:shift_add|accum[6]                                                                                     ; |filter|accumulator:shift_add|accum[6]~COMBOUT                                                                             ; combout          ;
; |filter|accumulator:shift_add|accum[6]                                                                                     ; |filter|accumulator:shift_add|accum[6]                                                                                     ; regout           ;
; |filter|accumulator:shift_add|accum[7]                                                                                     ; |filter|accumulator:shift_add|accum[7]~COMBOUT                                                                             ; combout          ;
; |filter|accumulator:shift_add|accum[7]                                                                                     ; |filter|accumulator:shift_add|accum[7]                                                                                     ; regout           ;
; |filter|accumulator:shift_add|accum[8]                                                                                     ; |filter|accumulator:shift_add|accum[8]~COMBOUT                                                                             ; combout          ;
; |filter|accumulator:shift_add|accum[8]                                                                                     ; |filter|accumulator:shift_add|accum[8]                                                                                     ; regout           ;
; |filter|accumulator:shift_add|accum[9]                                                                                     ; |filter|accumulator:shift_add|accum[9]~COMBOUT                                                                             ; combout          ;
; |filter|accumulator:shift_add|accum[9]                                                                                     ; |filter|accumulator:shift_add|accum[9]                                                                                     ; regout           ;
; |filter|accumulator:shift_add|accum[10]                                                                                    ; |filter|accumulator:shift_add|accum[10]~COMBOUT                                                                            ; combout          ;
; |filter|accumulator:shift_add|accum[10]                                                                                    ; |filter|accumulator:shift_add|accum[10]                                                                                    ; regout           ;
; |filter|accumulator:shift_add|accum[11]                                                                                    ; |filter|accumulator:shift_add|accum[11]~COMBOUT                                                                            ; combout          ;
; |filter|accumulator:shift_add|accum[11]                                                                                    ; |filter|accumulator:shift_add|accum[11]                                                                                    ; regout           ;
; |filter|accumulator:shift_add|accum[12]                                                                                    ; |filter|accumulator:shift_add|accum[12]~COMBOUT                                                                            ; combout          ;
; |filter|accumulator:shift_add|accum[12]                                                                                    ; |filter|accumulator:shift_add|accum[12]                                                                                    ; regout           ;
; |filter|accumulator:shift_add|accum[13]                                                                                    ; |filter|accumulator:shift_add|accum[13]~COMBOUT                                                                            ; combout          ;
; |filter|accumulator:shift_add|accum[13]                                                                                    ; |filter|accumulator:shift_add|accum[13]                                                                                    ; regout           ;
; |filter|accumulator:shift_add|accum[14]                                                                                    ; |filter|accumulator:shift_add|accum[14]~COMBOUT                                                                            ; combout          ;
; |filter|accumulator:shift_add|accum[14]                                                                                    ; |filter|accumulator:shift_add|accum[14]                                                                                    ; regout           ;
; |filter|accumulator:shift_add|accum[15]                                                                                    ; |filter|accumulator:shift_add|accum[15]~COMBOUT                                                                            ; combout          ;
; |filter|accumulator:shift_add|accum[15]                                                                                    ; |filter|accumulator:shift_add|accum[15]                                                                                    ; regout           ;
; |filter|accumulator:shift_add|accum[16]                                                                                    ; |filter|accumulator:shift_add|accum[16]~COMBOUT                                                                            ; combout          ;
; |filter|accumulator:shift_add|accum[16]                                                                                    ; |filter|accumulator:shift_add|accum[16]                                                                                    ; regout           ;
; |filter|accumulator:shift_add|accum[17]                                                                                    ; |filter|accumulator:shift_add|accum[17]~COMBOUT                                                                            ; combout          ;
; |filter|accumulator:shift_add|accum[17]                                                                                    ; |filter|accumulator:shift_add|accum[17]                                                                                    ; regout           ;
; |filter|accumulator:shift_add|accum[1]                                                                                     ; |filter|accumulator:shift_add|accum[1]                                                                                     ; regout           ;
; |filter|filter_con:cont|shift[18]                                                                                          ; |filter|filter_con:cont|shift[18]                                                                                          ; regout           ;
; |filter|accumulator:shift_add|accum[18]                                                                                    ; |filter|accumulator:shift_add|accum[18]                                                                                    ; regout           ;
; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|ram_block1a80                  ; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|ram_block1a80                  ; portadataout0    ;
; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|ram_block1a96                  ; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|ram_block1a96                  ; portadataout0    ;
; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|ram_block1a64                  ; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|ram_block1a64                  ; portadataout0    ;
; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|out_address_reg_a[0]           ; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|mux_8fb:mux2|w_result1073w~44  ; combout          ;
; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|out_address_reg_a[0]           ; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|out_address_reg_a[0]           ; regout           ;
; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|ram_block1a112                 ; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|ram_block1a112                 ; portadataout0    ;
; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|mux_8fb:mux2|w_result1073w~45  ; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|mux_8fb:mux2|w_result1073w~45  ; combout          ;
; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|mux_8fb:mux2|_~60              ; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|mux_8fb:mux2|_~60              ; combout          ;
; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|ram_block1a224                 ; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|ram_block1a224                 ; portadataout0    ;
; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|ram_block1a208                 ; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|ram_block1a208                 ; portadataout0    ;
; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|ram_block1a192                 ; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|ram_block1a192                 ; portadataout0    ;
; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|out_address_reg_a[1]           ; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|mux_8fb:mux2|w_result1075w~51  ; combout          ;
; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|out_address_reg_a[1]           ; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|out_address_reg_a[1]           ; regout           ;
; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|ram_block1a240                 ; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|ram_block1a240                 ; portadataout0    ;
; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|mux_8fb:mux2|w_result1075w~52  ; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|mux_8fb:mux2|w_result1075w~52  ; combout          ;
; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|mux_8fb:mux2|_~63              ; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|mux_8fb:mux2|_~63              ; combout          ;
; |filter|accumulator:shift_add|lpm_add_sub:adder|alt_stratix_add_sub:stratix_adder|add_sub_cell[0]                          ; |filter|accumulator:shift_add|lpm_add_sub:adder|alt_stratix_add_sub:stratix_adder|result[0]                                ; combout          ;
; |filter|accumulator:shift_add|lpm_add_sub:adder|alt_stratix_add_sub:stratix_adder|add_sub_cell[0]                          ; |filter|accumulator:shift_add|lpm_add_sub:adder|alt_stratix_add_sub:stratix_adder|add_sub_cell[0]~COUT                     ; cout0            ;
; |filter|accumulator:shift_add|lpm_add_sub:adder|alt_stratix_add_sub:stratix_adder|add_sub_cell[0]                          ; |filter|accumulator:shift_add|lpm_add_sub:adder|alt_stratix_add_sub:stratix_adder|add_sub_cell[0]~COUTCOUT1_16             ; cout1            ;
; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|ram_block1a176                 ; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|ram_block1a176                 ; portadataout0    ;
; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|ram_block1a144                 ; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|ram_block1a144                 ; portadataout0    ;
; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|mux_8fb:mux2|w_result1157w~456 ; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|mux_8fb:mux2|w_result1157w~456 ; combout          ;
; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|ram_block1a160                 ; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|ram_block1a160                 ; portadataout0    ;
; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|ram_block1a128                 ; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|ram_block1a128                 ; portadataout0    ;
; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|mux_8fb:mux2|w_result1157w~457 ; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|mux_8fb:mux2|w_result1157w~457 ; combout          ;
; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|out_address_reg_a[2]           ; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|mux_8fb:mux2|w_result1157w~458 ; combout          ;
; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|out_address_reg_a[2]           ; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|out_address_reg_a[2]           ; regout           ;