filter.sim.rpt

FPGA开发光盘各章节实例的设计工程与源码

; Check outputs                                                                              ; Off        ; Off           ;
; Report simulation coverage                                                                 ; On         ; On            ;
; Display complete 1/0 value coverage report                                                 ; On         ; On            ;
; Display missing 1-value coverage report                                                    ; On         ; On            ;
; Display missing 0-value coverage report                                                    ; On         ; On            ;
; Detect setup and hold time violations                                                      ; Off        ; Off           ;
; Detect glitches                                                                            ; Off        ; Off           ;
; Disable timing delays in Timing Simulation                                                 ; Off        ; Off           ;
; Generate Signal Activity File                                                              ; Off        ; Off           ;
; Generate VCD File for PowerPlay Power Analyzer                                             ; Off        ; Off           ;
; Group bus channels in simulation results                                                   ; Off        ; Off           ;
; Preserve fewer signal transitions to reduce memory requirements                            ; On         ; On            ;
; Trigger vector comparison with the specified mode                                          ; INPUT_EDGE ; INPUT_EDGE    ;
; Disable setup and hold time violations detection in input registers of bi-directional pins ; Off        ; Off           ;
; Overwrite Waveform Inputs With Simulation Outputs                                          ; On         ;               ;
; Glitch Filtering                                                                           ; Off        ; Off           ;
+--------------------------------------------------------------------------------------------+------------+---------------+


+----------------------+
; Simulation Waveforms ;
+----------------------+
Waveform report data cannot be output to ASCII.
Please use Quartus II to view the waveform report data.


+--------------------------------------------------------------------------------------------------------+
; |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|ALTSYNCRAM ;
+--------------------------------------------------------------------------------------------------------+
Memory report data cannot be output to ASCII.
Please use Quartus II to view the memory report data.


+--------------------------------------------------------------------+
; Coverage Summary                                                   ;
+-----------------------------------------------------+--------------+
; Type                                                ; Value        ;
+-----------------------------------------------------+--------------+
; Total coverage as a percentage                      ;      99.90 % ;
; Total nodes checked                                 ; 956          ;
; Total output ports checked                          ; 1005         ;
; Total output ports with complete 1/0-value coverage ; 1004         ;
; Total output ports with no 1/0-value coverage       ; 1            ;
; Total output ports with no 1-value coverage         ; 1            ;
; Total output ports with no 0-value coverage         ; 1            ;
+-----------------------------------------------------+--------------+


The following table displays output ports that toggle between 1 and 0 during simulation.
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Complete 1/0-Value Coverage                                                                                                                                                                                                                                                ;
+----------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------+------------------+
; Node Name                                                                                                                  ; Output Port Name                                                                                                           ; Output Port Type ;
+----------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------+------------------+
; |filter|accumulator:shift_add|flip[1]                                                                                      ; |filter|accumulator:shift_add|flip[1]                                                                                      ; regout           ;
; |filter|accumulator:shift_add|flip[2]                                                                                      ; |filter|accumulator:shift_add|flip[2]                                                                                      ; regout           ;
; |filter|accumulator:shift_add|flip[3]                                                                                      ; |filter|accumulator:shift_add|flip[3]                                                                                      ; regout           ;
; |filter|accumulator:shift_add|flip[4]                                                                                      ; |filter|accumulator:shift_add|flip[4]                                                                                      ; regout           ;
; |filter|accumulator:shift_add|flip[5]                                                                                      ; |filter|accumulator:shift_add|flip[5]                                                                                      ; regout           ;
; |filter|accumulator:shift_add|flip[6]                                                                                      ; |filter|accumulator:shift_add|flip[6]                                                                                      ; regout           ;
; |filter|accumulator:shift_add|flip[7]                                                                                      ; |filter|accumulator:shift_add|flip[7]                                                                                      ; regout           ;
; |filter|accumulator:shift_add|flip[8]                                                                                      ; |filter|accumulator:shift_add|flip[8]                                                                                      ; regout           ;
; |filter|accumulator:shift_add|flip[9]                                                                                      ; |filter|accumulator:shift_add|flip[9]                                                                                      ; regout           ;
; |filter|accumulator:shift_add|flip[10]                                                                                     ; |filter|accumulator:shift_add|flip[10]                                                                                     ; regout           ;
; |filter|accumulator:shift_add|flip[11]                                                                                     ; |filter|accumulator:shift_add|flip[11]                                                                                     ; regout           ;
; |filter|accumulator:shift_add|flip[12]                                                                                     ; |filter|accumulator:shift_add|flip[12]                                                                                     ; regout           ;
; |filter|accumulator:shift_add|flip[13]                                                                                     ; |filter|accumulator:shift_add|flip[13]                                                                                     ; regout           ;