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📄 filter.map.rpt

📁 FPGA开发光盘各章节实例的设计工程与源码
💻 RPT
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; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                               ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                               ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                               ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                               ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                               ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                               ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                               ;
; BYTE_SIZE                          ; 8                    ; Untyped                               ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                               ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                               ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                               ;
; INIT_FILE                          ; wrom.mif             ; Untyped                               ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                               ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                               ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                               ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                               ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                               ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                               ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                               ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                               ;
; ENABLE_ECC                         ; FALSE                ; Untyped                               ;
; DEVICE_FAMILY                      ; Stratix              ; Untyped                               ;
; CBXI_PARAMETER                     ; altsyncram_v331      ; Untyped                               ;
+------------------------------------+----------------------+---------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: accumulator:shift_add ;
+----------------+-------+-------------------------------------------+
; Parameter Name ; Value ; Type                                      ;
+----------------+-------+-------------------------------------------+
; x_width        ; 16    ; Untyped                                   ;
; x_pre          ; 15    ; Untyped                                   ;
; y_width        ; 12    ; Untyped                                   ;
; y_pre          ; 10    ; Untyped                                   ;
; out_int        ; 3     ; Untyped                                   ;
; out_pre        ; 15    ; Untyped                                   ;
; pipeline       ; yes   ; Untyped                                   ;
+----------------+-------+-------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: accumulator:shift_add|lpm_add_sub:adder ;
+------------------------+-------------+-----------------------------------------------+
; Parameter Name         ; Value       ; Type                                          ;
+------------------------+-------------+-----------------------------------------------+
; LPM_WIDTH              ; 17          ; Untyped                                       ;
; LPM_REPRESENTATION     ; unsigned    ; Untyped                                       ;
; LPM_DIRECTION          ; DEFAULT     ; Untyped                                       ;
; ONE_INPUT_IS_CONSTANT  ; NO          ; Untyped                                       ;
; LPM_PIPELINE           ; 0           ; Untyped                                       ;
; MAXIMIZE_SPEED         ; 5           ; Untyped                                       ;
; REGISTERED_AT_END      ; 0           ; Untyped                                       ;
; OPTIMIZE_FOR_SPEED     ; 1           ; Untyped                                       ;
; USE_CS_BUFFERS         ; 1           ; Untyped                                       ;
; CARRY_CHAIN            ; MANUAL      ; Untyped                                       ;
; CARRY_CHAIN_LENGTH     ; 32          ; CARRY_CHAIN_LENGTH                            ;
; DEVICE_FAMILY          ; Stratix     ; Untyped                                       ;
; USE_WYS                ; OFF         ; Untyped                                       ;
; STYLE                  ; FAST        ; Untyped                                       ;
; CBXI_PARAMETER         ; add_sub_jqd ; Untyped                                       ;
; AUTO_CARRY_CHAINS      ; ON          ; AUTO_CARRY                                    ;
; IGNORE_CARRY_BUFFERS   ; OFF         ; IGNORE_CARRY                                  ;
; AUTO_CASCADE_CHAINS    ; ON          ; AUTO_CASCADE                                  ;
; IGNORE_CASCADE_BUFFERS ; OFF         ; IGNORE_CASCADE                                ;
+------------------------+-------------+-----------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 6.1 Build 201 11/27/2006 SJ Full Version
    Info: Processing started: Mon Dec 10 15:43:34 2007
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off filter -c filter
Info: Found 1 design units, including 1 entities, in source file filter_coef.tdf
    Info: Found entity 1: filter_coef
Info: Found 1 design units, including 1 entities, in source file filter_shift.tdf
    Info: Found entity 1: filter_shift
Info: Found 1 design units, including 1 entities, in source file p_s.tdf
    Info: Found entity 1: p_s
Info: Found 1 design units, including 1 entities, in source file s_term.tdf
    Info: Found entity 1: s_term
Info: Found 1 design units, including 1 entities, in source file accumulator.tdf
    Info: Found entity 1: accumulator
Info: Found 1 design units, including 1 entities, in source file filter_con.tdf
    Info: Found entity 1: filter_con
Info: Found 1 design units, including 1 entities, in source file filter.tdf
    Info: Found entity 1: filter
Info: Elaborating entity "filter" for the top level hierarchy
Info: Elaborating entity "filter_con" for hierarchy "filter_con:cont"
Info: Elaborating entity "filter_shift" for hierarchy "filter_shift:shift_reg"
Info: Elaborating entity "s_term" for hierarchy "s_term:p_s_c"
Info: Elaborating entity "p_s" for hierarchy "s_term:p_s_c|p_s:regs[16]"
Info: Elaborating entity "filter_coef" for hierarchy "filter_coef:rom_coef"
Info: Found 1 design units, including 1 entities, in source file c:/altera/61/quartus/libraries/megafunctions/altsyncram.tdf
    Info: Found entity 1: altsyncram
Info: Elaborating entity "altsyncram" for hierarchy "filter_coef:rom_coef|altsyncram:altsyncram_component"
Info: Elaborated megafunction instantiation "filter_coef:rom_coef|altsyncram:altsyncram_component"
Info: Found 1 design units, including 1 entities, in source file db/altsyncram_v331.tdf
    Info: Found entity 1: altsyncram_v331
Info: Elaborating entity "altsyncram_v331" for hierarchy "filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated"
Info: Found 1 design units, including 1 entities, in source file db/mux_8fb.tdf
    Info: Found entity 1: mux_8fb
Info: Elaborating entity "mux_8fb" for hierarchy "filter_coef:rom_coef|altsyncram:altsyncram_component|altsyncram_v331:auto_generated|mux_8fb:mux2"
Info: Elaborating entity "accumulator" for hierarchy "accumulator:shift_add"
Info: Found 1 design units, including 1 entities, in source file c:/altera/61/quartus/libraries/megafunctions/lpm_add_sub.tdf
    Info: Found entity 1: lpm_add_sub
Info: Elaborating entity "lpm_add_sub" for hierarchy "accumulator:shift_add|lpm_add_sub:adder"
Info: Elaborated megafunction instantiation "accumulator:shift_add|lpm_add_sub:adder"
Info: Found 1 design units, including 1 entities, in source file c:/altera/61/quartus/libraries/megafunctions/alt_stratix_add_sub.tdf
    Info: Found entity 1: alt_stratix_add_sub
Info: Elaborating entity "alt_stratix_add_sub" for hierarchy "accumulator:shift_add|lpm_add_sub:adder|alt_stratix_add_sub:stratix_adder"
Info: Elaborated megafunction instantiation "accumulator:shift_add|lpm_add_sub:adder|alt_stratix_add_sub:stratix_adder", which is child of megafunction instantiation "accumulator:shift_add|lpm_add_sub:adder"
Info: Instantiated megafunction "accumulator:shift_add|lpm_add_sub:adder" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "17"
    Info: Parameter "LPM_REPRESENTATION" = "unsigned"
Info: Implemented 961 device resources after synthesis - the final resource count might be different
    Info: Implemented 15 input pins
    Info: Implemented 34 output pins
    Info: Implemented 656 logic cells
    Info: Implemented 256 RAM segments
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 0 warnings
    Info: Allocated 161 megabytes of memory during processing
    Info: Processing ended: Mon Dec 10 15:43:55 2007
    Info: Elapsed time: 00:00:21


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