rader_hilbert.sim.rpt

FPGA开发光盘各章节实例的设计工程与源码

; |rader_hilbert|sw1_4:inst23|temp[10]                                                                                                                          ; |rader_hilbert|sw1_4:inst23|temp[10]                                                                                                                                   ; regout           ;
; |rader_hilbert|sw1_4:inst23|temp[9]                                                                                                                           ; |rader_hilbert|sw1_4:inst23|temp[9]                                                                                                                                    ; regout           ;
; |rader_hilbert|sw1_4:inst23|temp[8]                                                                                                                           ; |rader_hilbert|sw1_4:inst23|temp[8]                                                                                                                                    ; regout           ;
; |rader_hilbert|sw1_4:inst23|temp[7]                                                                                                                           ; |rader_hilbert|sw1_4:inst23|temp[7]                                                                                                                                    ; regout           ;
; |rader_hilbert|sw1_4:inst23|temp[6]                                                                                                                           ; |rader_hilbert|sw1_4:inst23|temp[6]                                                                                                                                    ; regout           ;
; |rader_hilbert|sw1_4:inst23|temp[5]                                                                                                                           ; |rader_hilbert|sw1_4:inst23|temp[5]                                                                                                                                    ; regout           ;
; |rader_hilbert|sw1_4:inst23|temp[4]                                                                                                                           ; |rader_hilbert|sw1_4:inst23|temp[4]                                                                                                                                    ; regout           ;
; |rader_hilbert|sw1_4:inst23|temp[3]                                                                                                                           ; |rader_hilbert|sw1_4:inst23|temp[3]                                                                                                                                    ; regout           ;
; |rader_hilbert|sw1_4:inst23|temp[2]                                                                                                                           ; |rader_hilbert|sw1_4:inst23|temp[2]                                                                                                                                    ; regout           ;
; |rader_hilbert|sw1_4:inst23|temp[1]                                                                                                                           ; |rader_hilbert|sw1_4:inst23|temp[1]                                                                                                                                    ; regout           ;
; |rader_hilbert|sw1_4:inst23|temp[0]                                                                                                                           ; |rader_hilbert|sw1_4:inst23|temp[0]                                                                                                                                    ; regout           ;
; |rader_hilbert|rd_contr:inst10|inst17                                                                                                                         ; |rader_hilbert|rd_contr:inst10|inst17                                                                                                                                  ; regout           ;
; |rader_hilbert|rd_contract:inst22|wconout[15]                                                                                                                 ; |rader_hilbert|rd_contract:inst22|wconout[15]                                                                                                                          ; regout           ;
; |rader_hilbert|sw1_4:inst23|ad_clk1                                                                                                                           ; |rader_hilbert|sw1_4:inst23|ad_clk1                                                                                                                                    ; regout           ;
; |rader_hilbert|oesel:inst1|evenen                                                                                                                             ; |rader_hilbert|oesel:inst1|evenen                                                                                                                                      ; regout           ;
; |rader_hilbert|sw1_4:inst26|temp[15]~545                                                                                                                      ; |rader_hilbert|sw1_4:inst26|temp[15]~545                                                                                                                               ; combout          ;
; |rader_hilbert|rd_contract:inst22|wconout[14]                                                                                                                 ; |rader_hilbert|rd_contract:inst22|wconout[14]                                                                                                                          ; regout           ;
; |rader_hilbert|rd_contract:inst22|wconout[14]                                                                                                                 ; |rader_hilbert|rd_contract:inst22|wconout[14]~521COUT1_554                                                                                                             ; cout1            ;
; |rader_hilbert|rd_contract:inst22|wconout[13]                                                                                                                 ; |rader_hilbert|rd_contract:inst22|wconout[13]                                                                                                                          ; regout           ;
; |rader_hilbert|rd_contract:inst22|wconout[13]                                                                                                                 ; |rader_hilbert|rd_contract:inst22|wconout[13]~522COUT1_552                                                                                                             ; cout1            ;
; |rader_hilbert|rd_contract:inst22|wconout[12]                                                                                                                 ; |rader_hilbert|rd_contract:inst22|wconout[12]                                                                                                                          ; regout           ;
; |rader_hilbert|rd_contract:inst22|wconout[12]                                                                                                                 ; |rader_hilbert|rd_contract:inst22|wconout[12]~523                                                                                                                      ; cout             ;
; |rader_hilbert|rd_contract:inst22|wconout[11]                                                                                                                 ; |rader_hilbert|rd_contract:inst22|wconout[11]                                                                                                                          ; regout           ;
; |rader_hilbert|rd_contract:inst22|wconout[11]                                                                                                                 ; |rader_hilbert|rd_contract:inst22|wconout[11]~524                                                                                                                      ; cout0            ;
; |rader_hilbert|rd_contract:inst22|wconout[11]                                                                                                                 ; |rader_hilbert|rd_contract:inst22|wconout[11]~524COUT1_550                                                                                                             ; cout1            ;
; |rader_hilbert|rd_contract:inst22|wconout[10]                                                                                                                 ; |rader_hilbert|rd_contract:inst22|wconout[10]                                                                                                                          ; regout           ;
; |rader_hilbert|rd_contract:inst22|wconout[10]                                                                                                                 ; |rader_hilbert|rd_contract:inst22|wconout[10]~525                                                                                                                      ; cout0            ;
; |rader_hilbert|rd_contract:inst22|wconout[10]                                                                                                                 ; |rader_hilbert|rd_contract:inst22|wconout[10]~525COUT1_548                                                                                                             ; cout1            ;
; |rader_hilbert|rd_contract:inst22|wconout[9]                                                                                                                  ; |rader_hilbert|rd_contract:inst22|wconout[9]                                                                                                                           ; regout           ;
; |rader_hilbert|rd_contract:inst22|wconout[9]                                                                                                                  ; |rader_hilbert|rd_contract:inst22|wconout[9]~526                                                                                                                       ; cout0            ;
; |rader_hilbert|rd_contract:inst22|wconout[9]                                                                                                                  ; |rader_hilbert|rd_contract:inst22|wconout[9]~526COUT1_546                                                                                                              ; cout1            ;
; |rader_hilbert|rd_contract:inst22|wconout[8]                                                                                                                  ; |rader_hilbert|rd_contract:inst22|wconout[8]                                                                                                                           ; regout           ;
; |rader_hilbert|rd_contract:inst22|wconout[8]                                                                                                                  ; |rader_hilbert|rd_contract:inst22|wconout[8]~527                                                                                                                       ; cout0            ;
; |rader_hilbert|rd_contract:inst22|wconout[8]                                                                                                                  ; |rader_hilbert|rd_contract:inst22|wconout[8]~527COUT1_544                                                                                                              ; cout1            ;
; |rader_hilbert|rd_contract:inst22|wconout[7]                                                                                                                  ; |rader_hilbert|rd_contract:inst22|wconout[7]                                                                                                                           ; regout           ;
; |rader_hilbert|rd_contract:inst22|wconout[6]                                                                                                                  ; |rader_hilbert|rd_contract:inst22|wconout[6]                                                                                                                           ; regout           ;
; |rader_hilbert|rd_contract:inst22|wconout[5]                                                                                                                  ; |rader_hilbert|rd_contract:inst22|wconout[5]                                                                                                                           ; regout           ;
; |rader_hilbert|rd_contract:inst22|wconout[4]                                                                                                                  ; |rader_hilbert|rd_contract:inst22|wconout[4]                                                                                                                           ; regout           ;
; |rader_hilbert|rd_contract:inst22|wconout[3]                                                                                                                  ; |rader_hilbert|rd_contract:inst22|wconout[3]                                                                                                                           ; regout           ;
; |rader_hilbert|rd_contract:inst22|wconout[2]                                                                                                                  ; |rader_hilbert|rd_contract:inst22|wconout[2]                                                                                                                           ; regout           ;
; |rader_hilbert|rd_contract:inst22|wconout[1]                                                                                                                  ; |rader_hilbert|rd_contract:inst22|wconout[1]                                                                                                                           ; regout           ;
; |rader_hilbert|rd_contract:inst22|wconout[0]                                                                                                                  ; |rader_hilbert|rd_contract:inst22|wconout[0]                                                                                                                           ; regout           ;
; |rader_hilbert|rd_contract:inst25|wconout[15]                                                                                                                 ; |rader_hilbert|rd_contract:inst25|wconout[15]                                                                                                                          ; regout           ;
; |rader_hilbert|sw1_4:inst23|temp[15]~545                                                                                                                      ; |rader_hilbert|sw1_4:inst23|temp[15]~545                                                                                                                               ; combout          ;
; |rader_hilbert|rd_contract:inst25|wconout[14]                                                                                                                 ; |rader_hilbert|rd_contract:inst25|wconout[14]                                                                                                                          ; regout           ;
; |rader_hilbert|rd_contract:inst25|wconout[14]                                                                                                                 ; |rader_hilbert|rd_contract:inst25|wconout[14]~521COUT1_554                                                                                                             ; cout1            ;
; |rader_hilbert|rd_contract:inst25|wconout[13]                                                                                                                 ; |rader_hilbert|rd_contract:inst25|wconout[13]                                                                                                                          ; regout           ;
; |rader_hilbert|rd_contract:inst25|wconout[13]                                                                                                                 ; |rader_hilbert|rd_contract:inst25|wconout[13]~522COUT1_552                                                                                                             ; cout1            ;
; |rader_hilbert|rd_contract:inst25|wconout[12]                                                                                                                 ; |rader_hilbert|rd_contract:inst25|wconout[12]                                                                                                                          ; regout           ;
; |rader_hilbert|rd_contract:inst25|wconout[12]                                                                                                                 ; |rader_hilbert|rd_contract:inst25|wconout[12]~523                                                                                                                      ; cout             ;
; |rader_hilbert|rd_contract:inst25|wconout[11]                                                                                                                 ; |rader_hilbert|rd_contract:inst25|wconout[11]                                                                                                                          ; regout           ;
; |rader_hilbert|rd_contract:inst25|wconout[11]                                                                                                                 ; |rader_hilbert|rd_contract:inst25|wconout[11]~524                                                                                                                      ; cout0            ;
; |rader_hilbert|rd_contract:inst25|wconout[11]                                                                                                                 ; |rader_hilbert|rd_contract:inst25|wconout[11]~524COUT1_550                                                                                                             ; cout1            ;
; |rader_hilbert|rd_contract:inst25|wconout[10]                                                                                                                 ; |rader_hilbert|rd_contract:inst25|wconout[10]                                                                                                                          ; regout           ;
; |rader_hilbert|rd_contract:inst25|wconout[10]                                                                                                                 ; |rader_hilbert|rd_contract:inst25|wconout[10]~525                                                                                                                      ; cout0            ;
; |rader_hilbert|rd_contract:inst25|wconout[10]                                                                                                                 ; |rader_hilbert|rd_contract:inst25|wconout[10]~525COUT1_548                                                                                                             ; cout1            ;