sw1_4.eqn

FPGA开发光盘各章节实例的设计工程与源码

--C1_safe_q[1] is lpm_counter:cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[1] and unplaced
--operation mode is normal

C1_safe_q[1]_carry_eqn = C1L3;
C1_safe_q[1]_lut_out = C1_safe_q[1] $ C1_safe_q[1]_carry_eqn;
C1_safe_q[1] = DFFEA(C1_safe_q[1]_lut_out, clk, VCC, A1L31, , );


--C1_safe_q[0] is lpm_counter:cnt_rtl_0|alt_counter_stratix:wysi_counter|safe_q[0] and unplaced
--operation mode is arithmetic

C1_safe_q[0]_lut_out = !C1_safe_q[0];
C1_safe_q[0] = DFFEA(C1_safe_q[0]_lut_out, clk, VCC, A1L31, , );

--C1L3 is lpm_counter:cnt_rtl_0|alt_counter_stratix:wysi_counter|counter_cell[0]~COUT and unplaced
--operation mode is arithmetic

C1L3 = CARRY(C1_safe_q[0]);


--A1L03Q is outdata[7]~reg0 and unplaced
--operation mode is normal

A1L03Q_lut_out = temp[7];
A1L03Q = DFFEA(A1L03Q_lut_out, clk, VCC, , , );


--A1L82Q is outdata[6]~reg0 and unplaced
--operation mode is normal

A1L82Q_lut_out = temp[6];
A1L82Q = DFFEA(A1L82Q_lut_out, clk, VCC, , , );


--A1L62Q is outdata[5]~reg0 and unplaced
--operation mode is normal

A1L62Q_lut_out = temp[5];
A1L62Q = DFFEA(A1L62Q_lut_out, clk, VCC, , , );


--A1L42Q is outdata[4]~reg0 and unplaced
--operation mode is normal

A1L42Q_lut_out = temp[4];
A1L42Q = DFFEA(A1L42Q_lut_out, clk, VCC, , , );


--A1L22Q is outdata[3]~reg0 and unplaced
--operation mode is normal

A1L22Q_lut_out = temp[3];
A1L22Q = DFFEA(A1L22Q_lut_out, clk, VCC, , , );


--A1L02Q is outdata[2]~reg0 and unplaced
--operation mode is normal

A1L02Q_lut_out = temp[2];
A1L02Q = DFFEA(A1L02Q_lut_out, clk, VCC, , , );


--A1L81Q is outdata[1]~reg0 and unplaced
--operation mode is normal

A1L81Q_lut_out = temp[1];
A1L81Q = DFFEA(A1L81Q_lut_out, clk, VCC, , , );


--A1L61Q is outdata[0]~reg0 and unplaced
--operation mode is normal

A1L61Q_lut_out = temp[0];
A1L61Q = DFFEA(A1L61Q_lut_out, clk, VCC, , , );


--temp[7] is temp[7] and unplaced
--operation mode is normal

temp[7]_lut_out = indata[7];
temp[7] = DFFEA(temp[7]_lut_out, clk, VCC, A1L04, , );


--temp[6] is temp[6] and unplaced
--operation mode is normal

temp[6]_lut_out = indata[6];
temp[6] = DFFEA(temp[6]_lut_out, clk, VCC, A1L04, , );


--temp[5] is temp[5] and unplaced
--operation mode is normal

temp[5]_lut_out = indata[5];
temp[5] = DFFEA(temp[5]_lut_out, clk, VCC, A1L04, , );


--temp[4] is temp[4] and unplaced
--operation mode is normal

temp[4]_lut_out = indata[4];
temp[4] = DFFEA(temp[4]_lut_out, clk, VCC, A1L04, , );


--temp[3] is temp[3] and unplaced
--operation mode is normal

temp[3]_lut_out = indata[3];
temp[3] = DFFEA(temp[3]_lut_out, clk, VCC, A1L04, , );


--temp[2] is temp[2] and unplaced
--operation mode is normal

temp[2]_lut_out = indata[2];
temp[2] = DFFEA(temp[2]_lut_out, clk, VCC, A1L04, , );


--temp[1] is temp[1] and unplaced
--operation mode is normal

temp[1]_lut_out = indata[1];
temp[1] = DFFEA(temp[1]_lut_out, clk, VCC, A1L04, , );


--temp[0] is temp[0] and unplaced
--operation mode is normal

temp[0]_lut_out = indata[0];
temp[0] = DFFEA(temp[0]_lut_out, clk, VCC, A1L04, , );


--ad_clk1 is ad_clk1 and unplaced
--operation mode is normal

ad_clk1_lut_out = ad_clk;
ad_clk1 = DFFEA(ad_clk1_lut_out, clk, VCC, , , );


--A1L04 is temp[7]~0 and unplaced
--operation mode is normal

A1L04 = ad_clk & !ad_clk1 & !C1_safe_q[0] & !C1_safe_q[1];


--A1L31 is i~2 and unplaced
--operation mode is normal

A1L31 = ad_clk & !ad_clk1;


--clk is clk and unplaced
--operation mode is input

clk = INPUT();


--indata[7] is indata[7] and unplaced
--operation mode is input

indata[7] = INPUT();


--ad_clk is ad_clk and unplaced
--operation mode is input

ad_clk = INPUT();


--indata[6] is indata[6] and unplaced
--operation mode is input

indata[6] = INPUT();


--indata[5] is indata[5] and unplaced
--operation mode is input

indata[5] = INPUT();


--indata[4] is indata[4] and unplaced
--operation mode is input

indata[4] = INPUT();


--indata[3] is indata[3] and unplaced
--operation mode is input

indata[3] = INPUT();


--indata[2] is indata[2] and unplaced
--operation mode is input

indata[2] = INPUT();


--indata[1] is indata[1] and unplaced
--operation mode is input

indata[1] = INPUT();


--indata[0] is indata[0] and unplaced
--operation mode is input

indata[0] = INPUT();


--outdata[7] is outdata[7] and unplaced
--operation mode is output

outdata[7] = OUTPUT(A1L03Q);


--outdata[6] is outdata[6] and unplaced
--operation mode is output

outdata[6] = OUTPUT(A1L82Q);


--outdata[5] is outdata[5] and unplaced
--operation mode is output

outdata[5] = OUTPUT(A1L62Q);


--outdata[4] is outdata[4] and unplaced
--operation mode is output

outdata[4] = OUTPUT(A1L42Q);


--outdata[3] is outdata[3] and unplaced
--operation mode is output

outdata[3] = OUTPUT(A1L22Q);


--outdata[2] is outdata[2] and unplaced
--operation mode is output

outdata[2] = OUTPUT(A1L02Q);


--outdata[1] is outdata[1] and unplaced
--operation mode is output

outdata[1] = OUTPUT(A1L81Q);


--outdata[0] is outdata[0] and unplaced
--operation mode is output

outdata[0] = OUTPUT(A1L61Q);