rader_hilbert.hif

FPGA开发光盘各章节实例的设计工程与源码

cin2
-1
3
cin16
-1
3
cin15
-1
3
cin14
-1
3
cin13
-1
3
cin12
-1
3
cin11
-1
3
cin10
-1
3
cin1
-1
3
cin0
-1
3
}
# hierarchies {
rh_lpm_add_sub1:inst19|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node
rh_lpm_add_sub1:inst19|lpm_add_sub:lpm_add_sub_component|addcore:adder1_0[1]|a_csnbuffer:result_node
rh_lpm_add_sub1:inst21|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node
rh_lpm_add_sub1:inst21|lpm_add_sub:lpm_add_sub_component|addcore:adder1_0[1]|a_csnbuffer:result_node
}
# end
# entity
a_csnbuffer
# storage
db|rader_hilbert.(13).cnf
db|rader_hilbert.(13).cnf
# case_insensitive
# source_file
c:|altera|61|quartus|libraries|megafunctions|a_csnbuffer.tdf
0a953daa377c9212d3c374d37725bd
6
# user_parameter {
WIDTH
17
PARAMETER_UNKNOWN
USR
NEED_CARRY
0
PARAMETER_UNKNOWN
DEF
USE_CS_BUFFERS
1
PARAMETER_UNKNOWN
USR
}
# used_port {
sout0
-1
3
sin0
-1
3
ena
-1
3
clrn
-1
3
clk
-1
3
}
# hierarchies {
rh_lpm_add_sub1:inst19|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:cout_node
rh_lpm_add_sub1:inst19|lpm_add_sub:lpm_add_sub_component|addcore:adder1_0[1]|a_csnbuffer:cout_node
rh_lpm_add_sub1:inst21|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:cout_node
rh_lpm_add_sub1:inst21|lpm_add_sub:lpm_add_sub_component|addcore:adder1_0[1]|a_csnbuffer:cout_node
}
# end
# entity
addcore
# storage
db|rader_hilbert.(14).cnf
db|rader_hilbert.(14).cnf
# case_insensitive
# source_file
c:|altera|61|quartus|libraries|megafunctions|addcore.tdf
8840292178ac325542457f7daac85e6
6
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
width
17
PARAMETER_UNKNOWN
USR
REPRESENTATION
SIGNED
PARAMETER_UNKNOWN
DEF
DIRECTION
ADD
PARAMETER_UNKNOWN
USR
USE_CS_BUFFERS
1
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
DEVICE_FAMILY
Stratix
PARAMETER_UNKNOWN
USR
}
# used_port {
result9
-1
3
result8
-1
3
result7
-1
3
result6
-1
3
result5
-1
3
result4
-1
3
result3
-1
3
result2
-1
3
result16
-1
3
result15
-1
3
result14
-1
3
result13
-1
3
result12
-1
3
result11
-1
3
result10
-1
3
result1
-1
3
result0
-1
3
datab9
-1
3
datab8
-1
3
datab7
-1
3
datab6
-1
3
datab5
-1
3
datab4
-1
3
datab3
-1
3
datab2
-1
3
datab15
-1
3
datab14
-1
3
datab13
-1
3
datab12
-1
3
datab11
-1
3
datab10
-1
3
datab1
-1
3
datab0
-1
3
dataa9
-1
3
dataa8
-1
3
dataa7
-1
3
dataa6
-1
3
dataa5
-1
3
dataa4
-1
3
dataa3
-1
3
dataa2
-1
3
dataa15
-1
3
dataa14
-1
3
dataa13
-1
3
dataa12
-1
3
dataa11
-1
3
dataa10
-1
3
dataa1
-1
3
dataa0
-1
3
clock
-1
3
clken
-1
3
aclr
-1
3
}
# include_file {
c:|altera|61|quartus|libraries|megafunctions|aglobal61.inc
b513fb574ceb8f5886cd4ba429e82ec
c:|altera|61|quartus|libraries|megafunctions|addcore.inc
ff795e21e4847824c03218724f1a1252
c:|altera|61|quartus|libraries|megafunctions|a_csnbuffer.inc
49de46f6a395e2e6edecabe6eac9d873
}
# hierarchies {
rh_lpm_add_sub1:inst19|lpm_add_sub:lpm_add_sub_component|addcore:adder1_0[1]
rh_lpm_add_sub1:inst21|lpm_add_sub:lpm_add_sub_component|addcore:adder1_0[1]
}
# end
# entity
bypassff
# storage
db|rader_hilbert.(15).cnf
db|rader_hilbert.(15).cnf
# case_insensitive
# source_file
c:|altera|61|quartus|libraries|megafunctions|bypassff.tdf
b517810212489ff9c6342e9a2ecedfc
6
# user_parameter {
WIDTH
17
PARAMETER_UNKNOWN
USR
}
# used_port {
q9
-1
3
q8
-1
3
q7
-1
3
q6
-1
3
q5
-1
3
q4
-1
3
q3
-1
3
q2
-1
3
q15
-1
3
q14
-1
3
q13
-1
3
q12
-1
3
q11
-1
3
q10
-1
3
q1
-1
3
q0
-1
3
d9
-1
3
d8
-1
3
d7
-1
3
d6
-1
3
d5
-1
3
d4
-1
3
d3
-1
3
d2
-1
3
d16
-1
3
d15
-1
3
d14
-1
3
d13
-1
3
d12
-1
3
d11
-1
3
d10
-1
3
d1
-1
3
d0
-1
3
}
# hierarchies {
rh_lpm_add_sub1:inst19|lpm_add_sub:lpm_add_sub_component|bypassff:datab1_ff[1][1]
rh_lpm_add_sub1:inst19|lpm_add_sub:lpm_add_sub_component|bypassff:datab1_ff[1][0]
rh_lpm_add_sub1:inst21|lpm_add_sub:lpm_add_sub_component|bypassff:datab1_ff[1][1]
rh_lpm_add_sub1:inst21|lpm_add_sub:lpm_add_sub_component|bypassff:datab1_ff[1][0]
}
# end
# entity
bypassff
# storage
db|rader_hilbert.(16).cnf
db|rader_hilbert.(16).cnf
# case_insensitive
# source_file
c:|altera|61|quartus|libraries|megafunctions|bypassff.tdf
b517810212489ff9c6342e9a2ecedfc
6
# user_parameter {
WIDTH
17
PARAMETER_UNKNOWN
USR
}
# used_port {
q9
-1
3
q8
-1
3
q7
-1
3
q6
-1
3
q5
-1
3
q4
-1
3
q3
-1
3
q2
-1
3
q16
-1
3
q15
-1
3
q14
-1
3
q13
-1
3
q12
-1
3
q11
-1
3
q10
-1
3
q1
-1
3
q0
-1
3
d9
-1
3
d8
-1
3
d7
-1
3
d6
-1
3
d5
-1
3
d4
-1
3
d3
-1
3
d2
-1
3
d16
-1
3
d15
-1
3
d14
-1
3
d13
-1
3
d12
-1
3
d11
-1
3
d10
-1
3
d1
-1
3
d0
-1
3
}
# hierarchies {
rh_lpm_add_sub1:inst19|lpm_add_sub:lpm_add_sub_component|bypassff:datab1_ff[0][1]
rh_lpm_add_sub1:inst19|lpm_add_sub:lpm_add_sub_component|bypassff:datab1_ff[0][0]
rh_lpm_add_sub1:inst21|lpm_add_sub:lpm_add_sub_component|bypassff:datab1_ff[0][1]
rh_lpm_add_sub1:inst21|lpm_add_sub:lpm_add_sub_component|bypassff:datab1_ff[0][0]
}
# end
# entity
bypassff
# storage
db|rader_hilbert.(17).cnf
db|rader_hilbert.(17).cnf
# case_insensitive
# source_file
c:|altera|61|quartus|libraries|megafunctions|bypassff.tdf
b517810212489ff9c6342e9a2ecedfc
6
# user_parameter {
WIDTH
2
PARAMETER_UNKNOWN
USR
}
# used_port {
q1
-1
3
q0
-1
3
ena
-1
3
d1
-1
3
d0
-1
3
clrn
-1
3
clk
-1
3
}
# hierarchies {
rh_lpm_add_sub1:inst19|lpm_add_sub:lpm_add_sub_component|bypassff:sign_ff[0]
rh_lpm_add_sub1:inst21|lpm_add_sub:lpm_add_sub_component|bypassff:sign_ff[0]
}
# end
# entity
altshift
# storage
db|rader_hilbert.(18).cnf
db|rader_hilbert.(18).cnf
# case_insensitive
# source_file
c:|altera|61|quartus|libraries|megafunctions|altshift.tdf
08ed7c0fe11e08e6a429cbe556fd6bd
6
# user_parameter {
WIDTH
32
PARAMETER_UNKNOWN
USR
DEPTH
0
PARAMETER_UNKNOWN
USR
}
# used_port {
result9
-1
3
result8
-1
3
result7
-1
3
result6
-1
3
result5
-1
3
result4
-1
3
result31
-1
3
result30
-1
3
result3
-1
3
result29
-1
3
result28
-1
3
result27
-1
3
result26
-1
3
result25
-1
3
result24
-1
3
result23
-1
3
result22
-1
3
result21
-1
3
result20
-1
3
result2
-1
3
result19
-1
3
result18
-1
3
result17
-1
3
result16
-1
3
result15
-1
3
result14
-1
3
result13
-1
3
result12
-1
3
result11
-1
3
result10
-1
3
result1
-1
3
result0
-1
3
data9
-1
3
data8
-1
3
data7
-1
3
data6
-1
3
data5
-1
3
data4
-1
3
data31
-1
3
data30
-1
3
data3
-1
3
data29
-1
3
data28
-1
3
data27
-1
3
data26
-1
3
data25
-1
3
data24
-1
3
data23
-1
3
data22
-1
3
data21
-1
3
data20
-1
3
data2
-1
3
data19
-1
3
data18
-1
3
data17
-1
3
data16
-1
3
data15
-1
3
data14
-1
3
data13
-1
3
data12
-1
3
data11
-1
3
data10
-1
3
data1
-1
3
data0
-1
3
}
# hierarchies {
rh_lpm_add_sub1:inst19|lpm_add_sub:lpm_add_sub_component|altshift:result_ext_latency_ffs
rh_lpm_add_sub1:inst21|lpm_add_sub:lpm_add_sub_component|altshift:result_ext_latency_ffs
}
# end
# entity
altshift
# storage
db|rader_hilbert.(19).cnf
db|rader_hilbert.(19).cnf
# case_insensitive
# source_file
c:|altera|61|quartus|libraries|megafunctions|altshift.tdf
08ed7c0fe11e08e6a429cbe556fd6bd
6
# user_parameter {
WIDTH
1
PARAMETER_UNKNOWN
USR
DEPTH
0
PARAMETER_UNKNOWN
USR
}
# used_port {
result0
-1
3
data0
-1
3
}
# hierarchies {
rh_lpm_add_sub1:inst19|lpm_add_sub:lpm_add_sub_component|altshift:carry_ext_latency_ffs
rh_lpm_add_sub1:inst19|lpm_add_sub:lpm_add_sub_component|altshift:oflow_ext_latency_ffs
subdiv2:inst24|rd_lpm_add_sub2:lpm_add_sub2_component|lpm_add_sub:lpm_add_sub_component|altshift:carry_ext_latency_ffs
subdiv2:inst24|rd_lpm_add_sub2:lpm_add_sub2_component|lpm_add_sub:lpm_add_sub_component|altshift:oflow_ext_latency_ffs
rh_lpm_add_sub1:inst21|lpm_add_sub:lpm_add_sub_component|altshift:carry_ext_latency_ffs
rh_lpm_add_sub1:inst21|lpm_add_sub:lpm_add_sub_component|altshift:oflow_ext_latency_ffs
adddiv2:inst44|rd_lpm_add_sub0:lpm_add_sub0_component|lpm_add_sub:lpm_add_sub_component|altshift:carry_ext_latency_ffs
adddiv2:inst44|rd_lpm_add_sub0:lpm_add_sub0_component|lpm_add_sub:lpm_add_sub_component|altshift:oflow_ext_latency_ffs
}
# end
# entity
rh_lpm_mult0
# storage
db|rader_hilbert.(20).cnf
db|rader_hilbert.(20).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
rh_lpm_mult0.vhd
2f1eaf5a856025b7f52a8b8e269214
4
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
rh_lpm_mult0:inst15
}
# end
# entity
lpm_mult
# storage
db|rader_hilbert.(21).cnf
db|rader_hilbert.(21).cnf
# case_insensitive
# source_file
c:|altera|61|quartus|libraries|megafunctions|lpm_mult.tdf
b667ddb4c1fb4f9df0f26e8c7fe21cf0
6
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTHA
16
PARAMETER_SIGNED_DEC
USR
LPM_WIDTHB
16
PARAMETER_SIGNED_DEC
USR
LPM_WIDTHP
32
PARAMETER_SIGNED_DEC
USR
LPM_WIDTHR
0
PARAMETER_UNKNOWN
DEF
LPM_WIDTHS
32
PARAMETER_SIGNED_DEC
USR
LPM_REPRESENTATION
SIGNED
PARAMETER_UNKNOWN
USR
LPM_PIPELINE
0
PARAMETER_UNKNOWN
DEF
LATENCY
0
PARAMETER_UNKNOWN
DEF
INPUT_A_IS_CONSTANT
NO
PARAMETER_UNKNOWN
DEF
INPUT_B_IS_CONSTANT
YES
PARAMETER_UNKNOWN
USR
USE_EAB
OFF
PARAMETER_UNKNOWN
DEF
MAXIMIZE_SPEED
6
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Stratix
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
APEX20K_TECHNOLOGY_MAPPER
LUT
TECH_MAPPER_APEX20K
USR
DEDICATED_MULTIPLIER_CIRCUITRY
YES
PARAMETER_UNKNOWN
USR
DEDICATED_MULTIPLIER_MIN_INPUT_WIDTH_FOR_AUTO
0
PARAMETER_UNKNOWN
DEF
DEDICATED_MULTIPLIER_MIN_OUTPUT_WIDTH_FOR_AUTO
0
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
mult_v7u
PARAMETER_UNKNOWN
USR
INPUT_A_FIXED_VALUE
Bx
PARAMETER_UNKNOWN
DEF
INPUT_B_FIXED_VALUE
Bx
PARAMETER_UNKNOWN
DEF
USE_AHDL_IMPLEMENTATION
OFF
PARAMETER_UNKNOWN
DEF
}
# used_port {
result9
-1
3
result8
-1
3
result7
-1
3
result6
-1
3
result5
-1
3
result4
-1
3
result31
-1
3
result30
-1
3
result3
-1
3
result29
-1
3
result28
-1
3
result27
-1
3
result26
-1
3
result25
-1
3
result24
-1
3
result23
-1
3
result22
-1
3
result21
-1
3
result20
-1
3
result2
-1
3
result19
-1
3
result18
-1
3
result17
-1
3
result16
-1
3
result15
-1
3
result14
-1
3
result13
-1
3
result12
-1
3
result11
-1
3
result10
-1
3
result1
-1
3
result0
-1
3
dataa9
-1
3
dataa8
-1
3
dataa7
-1
3
dataa6
-1
3
dataa5
-1
3
dataa4
-1
3
dataa3
-1
3
dataa2
-1
3
dataa15
-1
3
dataa14
-1
3
dataa13
-1
3
dataa12
-1
3
dataa11
-1
3
dataa10
-1
3
dataa1
-1
3
dataa0
-1
3
datab9
-1
1
datab8
-1
1
datab6
-1
1
datab5
-1
1
datab3
-1
1
datab15
-1
1
datab14
-1
1
datab13
-1
1
datab12
-1
1
datab11
-1
1
datab10
-1
1
datab0
-1
1
datab7
-1
2
datab4
-1
2
datab2
-1
2
datab1
-1
2
}
# include_file {
c:|altera|61|quartus|libraries|megafunctions|aglobal61.inc
b513fb574ceb8f5886cd4ba429e82ec
c:|altera|61|quartus|libraries|megafunctions|bypassff.inc
8e8df160d449a63ec15dc86ecf2b373f
c:|altera|61|quartus|libraries|megafunctions|altshift.inc
70fa13aee7d6d160ef20b2de32813a
c:|altera|61|quartus|libraries|megafunctions|lpm_add_sub.inc
7d9a33dd39f13aa690c3d0edd88351
c:|altera|61|quartus|libraries|megafunctions|multcore.inc
13b7e8bee916e23c5f79837e9c670
}
# hierarchies {
rh_lpm_mult0:inst15|lpm_mult:lpm_mult_component
rh_lpm_mult_Q:inst2|lpm_mult:lpm_mult_component
}
# end
# entity
mult_v7u
# storage
db|rader_hilbert.(22).cnf
db|rader_hilbert.(22).cnf
# case_insensitive
# source_file
db|mult_v7u.tdf
7674617b3cd1d1d115efd1c09749c587
6
# user_parameter {
dataa_width
1
PARAMETER_UNKNOWN
DEF
datab_width
1
PARAMETER_UNKNOWN
DEF
datac_width
1
PARAMETER_UNKNOWN
DEF
datad_width
1
PARAMETER_UNKNOWN
DEF
dataout_width
72
PARAMETER_UNKNOWN
DEF
}
# used_port {
result9
-1
3
result8
-1
3
result7
-1
3
result6
-1
3
result5
-1
3
result4
-1
3
result31
-1
3
result30
-1
3
result3
-1
3
result29
-1
3
result28
-1
3
result27
-1
3
result26
-1
3
result25
-1
3
result24
-1
3
result23
-1
3
result22
-1
3
result21
-1
3
result20
-1
3
result2
-1
3
result19
-1
3
result18
-1
3
result17
-1
3
result16
-1
3
result15
-1
3
result14
-1
3
result13
-1
3
result12
-1
3
result11
-1
3
result10
-1
3
result1
-1
3
result0
-1
3
datab9
-1
3
datab8
-1
3
datab7
-1
3
datab6
-1
3
datab5
-1
3
datab4
-1
3
datab3
-1
3
datab2
-1
3
datab15
-1
3
datab14
-1
3
datab13
-1
3
datab12
-1
3
datab11
-1
3
datab10
-1
3
datab1
-1
3
datab0
-1
3
dataa9
-1
3
dataa8
-1
3
dataa7
-1
3
dataa6
-1
3
dataa5
-1
3
dataa4
-1
3
dataa3
-1
3
dataa2
-1
3
dataa15
-1
3
dataa14
-1
3
dataa13
-1
3
dataa12
-1
3
dataa11
-1
3
dataa10
-1
3
dataa1
-1
3
dataa0
-1
3
}
# hierarchies {
rh_lpm_mult0:inst15|lpm_mult:lpm_mult_component|mult_v7u:auto_generated
rh_lpm_mult_Q:inst2|lpm_mult:lpm_mult_component|mult_v7u:auto_generated
}
# end
# entity
subdiv2
# storage
db|rader_hilbert.(23).cnf
db|rader_hilbert.(23).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
subdiv2.vhd
bc33895f7511db528151f166da65d5f9
4