rader_hilbert.fit.eqn

FPGA开发光盘各章节实例的设计工程与源码

--X42_cs_buffer[16] is adddiv2:inst44|rd_lpm_add_sub0:lpm_add_sub0_component|lpm_add_sub:lpm_add_sub_component|addcore:adder|a_csnbuffer:result_node|cs_buffer[16] at LC_X67_Y8_N8
--operation mode is normal

X42_cs_buffer[16]_carry_eqn = (!X42_cout[12] & X42L95) # (X42_cout[12] & X42L06);
X42_cs_buffer[16] = Q2_dffs[15] $ X42_cs_buffer[16]_carry_eqn $ !Q5_dffs[15];


--X42L02 is adddiv2:inst44|rd_lpm_add_sub0:lpm_add_sub0_component|lpm_add_sub:lpm_add_sub_component|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~COUT0 at LC_X67_Y9_N2
--operation mode is arithmetic

X42L02_cout_0 = Q2_dffs[0] & Q5_dffs[0];
X42L02 = CARRY(X42L02_cout_0);

--X42L12 is adddiv2:inst44|rd_lpm_add_sub0:lpm_add_sub0_component|lpm_add_sub:lpm_add_sub_component|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~COUT1 at LC_X67_Y9_N2
--operation mode is arithmetic

X42L12_cout_1 = Q2_dffs[0] & Q5_dffs[0];
X42L12 = CARRY(X42L12_cout_1);


--S1_mac_mult2 is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|mac_mult2 at DSPMULT_X68_Y7_N0
--DSP Block Multiplier Base Width: 18-bits
S1_mac_mult2_a_data = DATA(X42_cs_buffer[16], X42_cs_buffer[15], X42_cs_buffer[14], X42_cs_buffer[13], X42_cs_buffer[12], X42_cs_buffer[11], X42_cs_buffer[10], X42_cs_buffer[9], X42_cs_buffer[8], X42_cs_buffer[7], X42_cs_buffer[6], X42_cs_buffer[5], X42_cs_buffer[4], X42_cs_buffer[3], X42_cs_buffer[2], X42_cs_buffer[1]);
S1_mac_mult2_a_rep = SIGNED(S1_mac_mult2_a_data);
S1_mac_mult2_b_data = DATA(GND, GND, GND, GND, GND, GND, GND, GND, VCC, GND, GND, VCC, GND, VCC, VCC, GND);
S1_mac_mult2_b_rep = SIGNED(S1_mac_mult2_b_data);
S1_mac_mult2_result = S1_mac_mult2_a_rep * S1_mac_mult2_b_rep;
S1_mac_mult2 = S1_mac_mult2_result[0];

--S1L01 is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|mac_mult2~DATAOUT1 at DSPMULT_X68_Y7_N0
S1L01 = S1_mac_mult2_result[1];

--S1L11 is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|mac_mult2~DATAOUT2 at DSPMULT_X68_Y7_N0
S1L11 = S1_mac_mult2_result[2];

--S1L21 is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|mac_mult2~DATAOUT3 at DSPMULT_X68_Y7_N0
S1L21 = S1_mac_mult2_result[3];

--S1L31 is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|mac_mult2~DATAOUT4 at DSPMULT_X68_Y7_N0
S1L31 = S1_mac_mult2_result[4];

--S1L41 is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|mac_mult2~DATAOUT5 at DSPMULT_X68_Y7_N0
S1L41 = S1_mac_mult2_result[5];

--S1L51 is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|mac_mult2~DATAOUT6 at DSPMULT_X68_Y7_N0
S1L51 = S1_mac_mult2_result[6];

--S1L61 is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|mac_mult2~DATAOUT7 at DSPMULT_X68_Y7_N0
S1L61 = S1_mac_mult2_result[7];

--S1L71 is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|mac_mult2~DATAOUT8 at DSPMULT_X68_Y7_N0
S1L71 = S1_mac_mult2_result[8];

--S1L81 is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|mac_mult2~DATAOUT9 at DSPMULT_X68_Y7_N0
S1L81 = S1_mac_mult2_result[9];

--S1L91 is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|mac_mult2~DATAOUT10 at DSPMULT_X68_Y7_N0
S1L91 = S1_mac_mult2_result[10];

--S1L02 is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|mac_mult2~DATAOUT11 at DSPMULT_X68_Y7_N0
S1L02 = S1_mac_mult2_result[11];

--S1L12 is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|mac_mult2~DATAOUT12 at DSPMULT_X68_Y7_N0
S1L12 = S1_mac_mult2_result[12];

--S1L22 is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|mac_mult2~DATAOUT13 at DSPMULT_X68_Y7_N0
S1L22 = S1_mac_mult2_result[13];

--S1L32 is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|mac_mult2~DATAOUT14 at DSPMULT_X68_Y7_N0
S1L32 = S1_mac_mult2_result[14];

--S1L42 is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|mac_mult2~DATAOUT15 at DSPMULT_X68_Y7_N0
S1L42 = S1_mac_mult2_result[15];

--S1L52 is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|mac_mult2~DATAOUT16 at DSPMULT_X68_Y7_N0
S1L52 = S1_mac_mult2_result[16];

--S1L62 is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|mac_mult2~DATAOUT17 at DSPMULT_X68_Y7_N0
S1L62 = S1_mac_mult2_result[17];

--S1L72 is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|mac_mult2~DATAOUT18 at DSPMULT_X68_Y7_N0
S1L72 = S1_mac_mult2_result[18];

--S1L82 is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|mac_mult2~DATAOUT19 at DSPMULT_X68_Y7_N0
S1L82 = S1_mac_mult2_result[19];

--S1L92 is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|mac_mult2~DATAOUT20 at DSPMULT_X68_Y7_N0
S1L92 = S1_mac_mult2_result[20];

--S1L03 is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|mac_mult2~DATAOUT21 at DSPMULT_X68_Y7_N0
S1L03 = S1_mac_mult2_result[21];

--S1L13 is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|mac_mult2~DATAOUT22 at DSPMULT_X68_Y7_N0
S1L13 = S1_mac_mult2_result[22];

--S1L23 is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|mac_mult2~DATAOUT23 at DSPMULT_X68_Y7_N0
S1L23 = S1_mac_mult2_result[23];

--S1L33 is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|mac_mult2~DATAOUT24 at DSPMULT_X68_Y7_N0
S1L33 = S1_mac_mult2_result[24];

--S1L43 is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|mac_mult2~DATAOUT25 at DSPMULT_X68_Y7_N0
S1L43 = S1_mac_mult2_result[25];

--S1L53 is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|mac_mult2~DATAOUT26 at DSPMULT_X68_Y7_N0
S1L53 = S1_mac_mult2_result[26];

--S1L63 is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|mac_mult2~DATAOUT27 at DSPMULT_X68_Y7_N0
S1L63 = S1_mac_mult2_result[27];

--S1L73 is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|mac_mult2~DATAOUT28 at DSPMULT_X68_Y7_N0
S1L73 = S1_mac_mult2_result[28];

--S1L83 is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|mac_mult2~DATAOUT29 at DSPMULT_X68_Y7_N0
S1L83 = S1_mac_mult2_result[29];

--S1L93 is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|mac_mult2~DATAOUT30 at DSPMULT_X68_Y7_N0
S1L93 = S1_mac_mult2_result[30];

--S1L04 is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|mac_mult2~DATAOUT31 at DSPMULT_X68_Y7_N0
S1L04 = S1_mac_mult2_result[31];

--S1L6 is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|mac_mult2~4 at DSPMULT_X68_Y7_N0
S1L6 = GND;

--S1L7 is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|mac_mult2~5 at DSPMULT_X68_Y7_N0
S1L7 = GND;

--S1L8 is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|mac_mult2~6 at DSPMULT_X68_Y7_N0
S1L8 = GND;

--S1L9 is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|mac_mult2~7 at DSPMULT_X68_Y7_N0
S1L9 = GND;


--S1_result[0] is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|result[0] at DSPOUT_X69_Y1_N0
--DSP Block Operation Mode: Simple Multiplier (18-bit)
S1_result[0] = S1_mac_mult2;

--S1_result[1] is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|result[1] at DSPOUT_X69_Y1_N0
S1_result[1] = S1L01;

--S1_result[2] is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|result[2] at DSPOUT_X69_Y1_N0
S1_result[2] = S1L11;

--S1_result[3] is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|result[3] at DSPOUT_X69_Y1_N0
S1_result[3] = S1L21;

--S1_result[4] is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|result[4] at DSPOUT_X69_Y1_N0
S1_result[4] = S1L31;

--S1_result[5] is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|result[5] at DSPOUT_X69_Y1_N0
S1_result[5] = S1L41;

--S1_result[6] is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|result[6] at DSPOUT_X69_Y1_N0
S1_result[6] = S1L51;

--S1_result[7] is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|result[7] at DSPOUT_X69_Y1_N0
S1_result[7] = S1L61;

--S1_result[8] is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|result[8] at DSPOUT_X69_Y1_N0
S1_result[8] = S1L71;

--S1_result[9] is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|result[9] at DSPOUT_X69_Y1_N0
S1_result[9] = S1L81;

--S1_result[10] is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|result[10] at DSPOUT_X69_Y1_N0
S1_result[10] = S1L91;

--S1_result[11] is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|result[11] at DSPOUT_X69_Y1_N0
S1_result[11] = S1L02;

--S1_result[12] is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|result[12] at DSPOUT_X69_Y1_N0
S1_result[12] = S1L12;

--S1_result[13] is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|result[13] at DSPOUT_X69_Y1_N0
S1_result[13] = S1L22;

--S1_result[14] is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|result[14] at DSPOUT_X69_Y1_N0
S1_result[14] = S1L32;

--S1_result[15] is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|result[15] at DSPOUT_X69_Y1_N0
S1_result[15] = S1L42;

--S1_result[16] is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|result[16] at DSPOUT_X69_Y1_N0
S1_result[16] = S1L52;

--S1_result[17] is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|result[17] at DSPOUT_X69_Y1_N0
S1_result[17] = S1L62;

--S1_result[18] is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|result[18] at DSPOUT_X69_Y1_N0
S1_result[18] = S1L72;

--S1_result[19] is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|result[19] at DSPOUT_X69_Y1_N0
S1_result[19] = S1L82;

--S1_result[20] is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|result[20] at DSPOUT_X69_Y1_N0
S1_result[20] = S1L92;

--S1_result[21] is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|result[21] at DSPOUT_X69_Y1_N0
S1_result[21] = S1L03;

--S1_result[22] is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|result[22] at DSPOUT_X69_Y1_N0
S1_result[22] = S1L13;

--S1_result[23] is rh_lpm_mult_q:inst2|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|result[23] at DSPOUT_X69_Y1_N0
S1_result[23] = S1L23;


--X81_sout_node[7] is rh_lpm_add_sub1:inst21|lpm_add_sub:lpm_add_sub_component|addcore:adder1_0[1]|a_csnbuffer:result_node|sout_node[7] at LC_X67_Y7_N7
--operation mode is normal

X81_sout_node[7]_carry_eqn = (!X81_cout[4] & X81L92) # (X81_cout[4] & X81L03);
X81_sout_node[7]_lut_out = F2L8Q $ X81_sout_node[7]_carry_eqn $ S1_result[23];
X81_sout_node[7] = DFFEA(X81_sout_node[7]_lut_out, GLOBAL(clk), VCC, , !E1_inst9, , );


--X21_sout_node[16] is rh_lpm_add_sub1:inst21|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[16] at LC_X70_Y7_N8
--operation mode is normal

X21_sout_node[16]_carry_eqn = (!X21_cout[12] & X21L95) # (X21_cout[12] & X21L06);
X21_sout_node[16]_lut_out = !X21_sout_node[16]_carry_eqn;
X21_sout_node[16] = DFFEA(X21_sout_node[16]_lut_out, GLOBAL(clk), VCC, , !E1_inst9, , );


--X21_cout[7] is rh_lpm_add_sub1:inst21|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|cout[7] at LC_X70_Y8_N9
--operation mode is arithmetic

X21_cout[7] = CARRY(F2L8Q & !S1_result[7] & !X21L02 # !F2L8Q & (!X21L02 # !S1_result[7]));


--X21L91 is rh_lpm_add_sub1:inst21|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|cout[6]~COUT0 at LC_X70_Y8_N8
--operation mode is arithmetic

X21L91_cout_0 = S1_result[6] & (F2L7Q # !X21L61) # !S1_result[6] & F2L7Q & !X21L61;
X21L91 = CARRY(X21L91_cout_0);

--X21L02 is rh_lpm_add_sub1:inst21|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|cout[6]~COUT1 at LC_X70_Y8_N8
--operation mode is arithmetic

X21L02_cout_1 = S1_result[6] & (F2L7Q # !X21L71) # !S1_result[6] & F2L7Q & !X21L71;
X21L02 = CARRY(X21L02_cout_1);


--X21L61 is rh_lpm_add_sub1:inst21|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|cout[5]~COUT0 at LC_X70_Y8_N7
--operation mode is arithmetic

X21L61_cout_0 = F2L6Q & !S1_result[5] & !X21L31 # !F2L6Q & (!X21L31 # !S1_result[5]);
X21L61 = CARRY(X21L61_cout_0);

--X21L71 is rh_lpm_add_sub1:inst21|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|cout[5]~COUT1 at LC_X70_Y8_N7
--operation mode is arithmetic

X21L71_cout_1 = F2L6Q & !S1_result[5] & !X21L41 # !F2L6Q & (!X21L41 # !S1_result[5]);
X21L71 = CARRY(X21L71_cout_1);


--X21L31 is rh_lpm_add_sub1:inst21|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|cout[4]~COUT0 at LC_X70_Y8_N6
--operation mode is arithmetic

X21L31_cout_0 = F2L5Q & (S1_result[4] # !X21L01) # !F2L5Q & S1_result[4] & !X21L01;
X21L31 = CARRY(X21L31_cout_0);

--X21L41 is rh_lpm_add_sub1:inst21|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|cout[4]~COUT1 at LC_X70_Y8_N6
--operation mode is arithmetic

X21L41_cout_1 = F2L5Q & (S1_result[4] # !X21L11) # !F2L5Q & S1_result[4] & !X21L11;
X21L41 = CARRY(X21L41_cout_1);


--X21L01 is rh_lpm_add_sub1:inst21|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|cout[3]~COUT0 at LC_X70_Y8_N5
--operation mode is arithmetic

X21L01_cout_0 = F2L4Q & !S1_result[3] & !X21_cout[2] # !F2L4Q & (!X21_cout[2] # !S1_result[3]);
X21L01 = CARRY(X21L01_cout_0);

--X21L11 is rh_lpm_add_sub1:inst21|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|cout[3]~COUT1 at LC_X70_Y8_N5
--operation mode is arithmetic

X21L11_cout_1 = F2L4Q & !S1_result[3] & !X21_cout[2] # !F2L4Q & (!X21_cout[2] # !S1_result[3]);
X21L11 = CARRY(X21L11_cout_1);


--X21_cout[2] is rh_lpm_add_sub1:inst21|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|cout[2] at LC_X70_Y8_N4
--operation mode is arithmetic

X21_cout[2] = CARRY(S1_result[2] & (F2L3Q # !X21L7) # !S1_result[2] & F2L3Q & !X21L7);


--X21L6 is rh_lpm_add_sub1:inst21|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|cout[1]~COUT0 at LC_X70_Y8_N3
--operation mode is arithmetic

X21L6_cout_0 = F2L2Q & !S1_result[1] & !X21L3 # !F2L2Q & (!X21L3 # !S1_result[1]);
X21L6 = CARRY(X21L6_cout_0);

--X21L7 is rh_lpm_add_sub1:inst21|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|cout[1]~COUT1 at LC_X70_Y8_N3
--operation mode is arithmetic

X21L7_cout_1 = F2L2Q & !S1_result[1] & !X21L4 # !F2L2Q & (!X21L4 # !S1_result[1]);
X21L7 = CARRY(X21L7_cout_1);


--X21L3 is rh_lpm_add_sub1:inst21|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|cout[0]~COUT0 at LC_X70_Y8_N2
--operation mode is arithmetic

X21L3_cout_0 = F2L1Q & S1_result[0];
X21L3 = CARRY(X21L3_cout_0);

--X21L4 is rh_lpm_add_sub1:inst21|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|cout[0]~COUT1 at LC_X70_Y8_N2
--operation mode is arithmetic

X21L4_cout_1 = F2L1Q & S1_result[0];
X21L4 = CARRY(X21L4_cout_1);


--L2L13Q is rd_contract:inst25|wconout[15]~reg0 at LC_X66_Y7_N7
--operation mode is normal

L2L13Q_carry_eqn = (!X51_cout[4] & L2L92) # (X51_cout[4] & L2L03);
L2L13Q_lut_out = X81_sout_node[7] $ L2L13Q_carry_eqn;
L2L13Q = DFFEA(L2L13Q_lut_out, GLOBAL(clk), VCC, , L2L1, , );


--X12_cs_buffer[16] is subdiv2:inst24|rd_lpm_add_sub2:lpm_add_sub2_component|lpm_add_sub:lpm_add_sub_component|addcore:adder|a_csnbuffer:result_node|cs_buffer[16] at LC_X67_Y23_N8
--operation mode is normal

X12_cs_buffer[16]_carry_eqn = (!X12_cout[12] & X12L95) # (X12_cout[12] & X12L06);
X12_cs_buffer[16] = Q1_dffs[15] $ X12_cs_buffer[16]_carry_eqn $ !Q3_dffs[15];


--X12L02 is subdiv2:inst24|rd_lpm_add_sub2:lpm_add_sub2_component|lpm_add_sub:lpm_add_sub_component|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~COUT0 at LC_X67_Y24_N2
--operation mode is arithmetic

X12L02_cout_0 = Q3_dffs[0] # !Q1_dffs[0];
X12L02 = CARRY(X12L02_cout_0);

--X12L12 is subdiv2:inst24|rd_lpm_add_sub2:lpm_add_sub2_component|lpm_add_sub:lpm_add_sub_component|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~COUT1 at LC_X67_Y24_N2
--operation mode is arithmetic

X12L12_cout_1 = Q3_dffs[0] # !Q1_dffs[0];
X12L12 = CARRY(X12L12_cout_1);


--S2_mac_mult2 is rh_lpm_mult0:inst15|lpm_mult:lpm_mult_component|mult_u6q:auto_generated|mac_mult2 at DSPMULT_X68_Y23_N0
--DSP Block Multiplier Base Width: 18-bits