generator.tcl

来自「FPGA开发光盘各章节实例的设计工程与源码」· TCL 代码 · 共 24 行

cmp start_batch

project start_batch

project start_batch generator
cmp add_assignment "" "" "" ROOT "|generator"
cmp add_assignment "" "" "" FAMILY "STRATIX"
cmp add_assignment "generator" "" "" DEVICE "EP1S25F780C5"
project add_assignment "" "generator" "" "" "EDA_DESIGN_ENTRY_SYNTHESIS_TOOL" "SYNPLIFY"
project add_assignment "" "eda_design_synthesis" "" "" "EDA_USE_LMF" "synplcty.lmf"
project add_assignment "generator" "" "" "CLK" "GLOBAL_SIGNAL" "ON"
project add_assignment "" "CLK_setting" "" "" "DUTY_CYCLE" "50.00"
project add_assignment "generator" "" "" "CLK" "USE_CLOCK_SETTINGS" "CLK_setting"
project add_assignment "" "CLK_setting" "" "" "FMAX_REQUIREMENT" "1.0MHZ"
project add_assignment "" "" "" "" "TAO_FILE" "myresults.tao"
project add_assignment "" "" "" "" "SOURCES_PER_DESTINATION_INCLUDE_COUNT" "1000"

project end_batch generator

project end_batch

cmp end_batch