tst_mult.qws

FPGA开发光盘各章节实例的设计工程与源码

[ProjectWorkspace]
ptn_Child1=Frames
[ProjectWorkspace.Frames]
ptn_Child1=ChildFrames
[ProjectWorkspace.Frames.ChildFrames]
ptn_Child1=Document-0
ptn_Child2=Document-1
ptn_Child3=Document-2
ptn_Child4=Document-3
ptn_Child5=Document-4
ptn_Child6=Document-5
[ProjectWorkspace.Frames.ChildFrames.Document-0]
ptn_Child1=ViewFrame-0
[ProjectWorkspace.Frames.ChildFrames.Document-0.ViewFrame-0]
DocPathName=tst_mult.vhd
DocumentCLSID={ca385d57-a4c7-11d1-a098-0020affa43f2}
WindowPlacement=MCAAAAAAAAAAAAAABAAAAAAAPPPPPPPPPPPPPPPPMPPPPPPPFOPPPPPPIGAAAAAAIGAAAAAAEMCAAAAAHLBAAAAA
IsChildFrameDetached=False
IsActiveChildFrame=False
ptn_Child1=StateMap
[ProjectWorkspace.Frames.ChildFrames.Document-0.ViewFrame-0.StateMap]
AFC_IN_REPORT=False
[ProjectWorkspace.Frames.ChildFrames.Document-4]
ptn_Child1=ViewFrame-0
[ProjectWorkspace.Frames.ChildFrames.Document-4.ViewFrame-0]
DocPathName=tst_mult.vwf
DocumentCLSID={4a9ed22a-e60b-11d1-a0bd-0020affa43f2}
WindowPlacement=MCAAAAAACAAAAAAADAAAAAAAPPPPPPPPPPPPPPPPMPPPPPPPFOPPPPPPOEAAAAAAOEAAAAAAEJCAAAAAHIBAAAAA
IsChildFrameDetached=False
IsActiveChildFrame=True
ptn_Child1=StateMap
[ProjectWorkspace.Frames.ChildFrames.Document-4.ViewFrame-0.StateMap]
AFC_SIM_AP_NAME=tst_mult
AFC_PROJ_DB_PATH=F:/复件 tijiao/程序及软件/cht04/s04p11tst_mult/db/tst_mult.quartus_db
AFC_IN_REPORT=False