loadfw.rpt

利用FPGA实现的DDS

-- Node name is ':127' = 'pipefw32' 
-- Equation name is 'pipefw32', location is LC3_C21, type is buried.
pipefw32 = DFFE( _EQ025, GLOBAL( SYSCLK),  VCC,  VCC,  VCC);
  _EQ025 =  FREQWORD18 &  loadp3 & !RESETN
         # !loadp3 &  pipefw32 & !RESETN;

-- Node name is ':126' = 'pipefw33' 
-- Equation name is 'pipefw33', location is LC4_C21, type is buried.
pipefw33 = DFFE( _EQ026, GLOBAL( SYSCLK),  VCC,  VCC,  VCC);
  _EQ026 =  FREQWORD19 &  loadp3 & !RESETN
         # !loadp3 &  pipefw33 & !RESETN;

-- Node name is ':125' = 'pipefw34' 
-- Equation name is 'pipefw34', location is LC2_C21, type is buried.
pipefw34 = DFFE( _EQ027, GLOBAL( SYSCLK),  VCC,  VCC,  VCC);
  _EQ027 =  FREQWORD20 &  loadp3 & !RESETN
         # !loadp3 &  pipefw34 & !RESETN;

-- Node name is ':124' = 'pipefw35' 
-- Equation name is 'pipefw35', location is LC6_C21, type is buried.
pipefw35 = DFFE( _EQ028, GLOBAL( SYSCLK),  VCC,  VCC,  VCC);
  _EQ028 =  FREQWORD21 &  loadp3 & !RESETN
         # !loadp3 &  pipefw35 & !RESETN;

-- Node name is ':123' = 'pipefw36' 
-- Equation name is 'pipefw36', location is LC5_C21, type is buried.
pipefw36 = DFFE( _EQ029, GLOBAL( SYSCLK),  VCC,  VCC,  VCC);
  _EQ029 =  FREQWORD22 &  loadp3 & !RESETN
         # !loadp3 &  pipefw36 & !RESETN;

-- Node name is ':122' = 'pipefw37' 
-- Equation name is 'pipefw37', location is LC7_C21, type is buried.
pipefw37 = DFFE( _EQ030, GLOBAL( SYSCLK),  VCC,  VCC,  VCC);
  _EQ030 =  FREQWORD23 &  loadp3 & !RESETN
         # !loadp3 &  pipefw37 & !RESETN;

-- Node name is ':137' = 'pipefw40' 
-- Equation name is 'pipefw40', location is LC8_B15, type is buried.
pipefw40 = DFFE( _EQ031, GLOBAL( SYSCLK),  VCC,  VCC,  VCC);
  _EQ031 =  FREQWORD24 &  loadp4 & !RESETN
         # !loadp4 &  pipefw40 & !RESETN;

-- Node name is ':136' = 'pipefw41' 
-- Equation name is 'pipefw41', location is LC6_B15, type is buried.
pipefw41 = DFFE( _EQ032, GLOBAL( SYSCLK),  VCC,  VCC,  VCC);
  _EQ032 =  FREQWORD25 &  loadp4 & !RESETN
         # !loadp4 &  pipefw41 & !RESETN;

-- Node name is ':135' = 'pipefw42' 
-- Equation name is 'pipefw42', location is LC2_B15, type is buried.
pipefw42 = DFFE( _EQ033, GLOBAL( SYSCLK),  VCC,  VCC,  VCC);
  _EQ033 =  FREQWORD26 &  loadp4 & !RESETN
         # !loadp4 &  pipefw42 & !RESETN;

-- Node name is ':134' = 'pipefw43' 
-- Equation name is 'pipefw43', location is LC5_B15, type is buried.
pipefw43 = DFFE( _EQ034, GLOBAL( SYSCLK),  VCC,  VCC,  VCC);
  _EQ034 =  FREQWORD27 &  loadp4 & !RESETN
         # !loadp4 &  pipefw43 & !RESETN;

-- Node name is ':133' = 'pipefw44' 
-- Equation name is 'pipefw44', location is LC3_B15, type is buried.
pipefw44 = DFFE( _EQ035, GLOBAL( SYSCLK),  VCC,  VCC,  VCC);
  _EQ035 =  FREQWORD28 &  loadp4 & !RESETN
         # !loadp4 &  pipefw44 & !RESETN;

-- Node name is ':132' = 'pipefw45' 
-- Equation name is 'pipefw45', location is LC7_B19, type is buried.
pipefw45 = DFFE( _EQ036, GLOBAL( SYSCLK),  VCC,  VCC,  VCC);
  _EQ036 =  FREQWORD29 &  loadp4 & !RESETN
         # !loadp4 &  pipefw45 & !RESETN;

-- Node name is ':131' = 'pipefw46' 
-- Equation name is 'pipefw46', location is LC4_B15, type is buried.
pipefw46 = DFFE( _EQ037, GLOBAL( SYSCLK),  VCC,  VCC,  VCC);
  _EQ037 =  FREQWORD30 &  loadp4 & !RESETN
         # !loadp4 &  pipefw46 & !RESETN;

-- Node name is ':130' = 'pipefw47' 
-- Equation name is 'pipefw47', location is LC7_B15, type is buried.
pipefw47 = DFFE( _EQ038, GLOBAL( SYSCLK),  VCC,  VCC,  VCC);
  _EQ038 =  FREQWORD31 &  loadp4 & !RESETN
         # !loadp4 &  pipefw47 & !RESETN;

-- Node name is 'SYNCFREQ0' 
-- Equation name is 'SYNCFREQ0', type is output 
SYNCFREQ0 =  pipefw10;

-- Node name is 'SYNCFREQ1' 
-- Equation name is 'SYNCFREQ1', type is output 
SYNCFREQ1 =  pipefw11;

-- Node name is 'SYNCFREQ2' 
-- Equation name is 'SYNCFREQ2', type is output 
SYNCFREQ2 =  pipefw12;

-- Node name is 'SYNCFREQ3' 
-- Equation name is 'SYNCFREQ3', type is output 
SYNCFREQ3 =  pipefw13;

-- Node name is 'SYNCFREQ4' 
-- Equation name is 'SYNCFREQ4', type is output 
SYNCFREQ4 =  pipefw14;

-- Node name is 'SYNCFREQ5' 
-- Equation name is 'SYNCFREQ5', type is output 
SYNCFREQ5 =  pipefw15;

-- Node name is 'SYNCFREQ6' 
-- Equation name is 'SYNCFREQ6', type is output 
SYNCFREQ6 =  pipefw16;

-- Node name is 'SYNCFREQ7' 
-- Equation name is 'SYNCFREQ7', type is output 
SYNCFREQ7 =  pipefw17;

-- Node name is 'SYNCFREQ8' 
-- Equation name is 'SYNCFREQ8', type is output 
SYNCFREQ8 =  pipefw20;

-- Node name is 'SYNCFREQ9' 
-- Equation name is 'SYNCFREQ9', type is output 
SYNCFREQ9 =  pipefw21;

-- Node name is 'SYNCFREQ10' 
-- Equation name is 'SYNCFREQ10', type is output 
SYNCFREQ10 =  pipefw22;

-- Node name is 'SYNCFREQ11' 
-- Equation name is 'SYNCFREQ11', type is output 
SYNCFREQ11 =  pipefw23;

-- Node name is 'SYNCFREQ12' 
-- Equation name is 'SYNCFREQ12', type is output 
SYNCFREQ12 =  pipefw24;

-- Node name is 'SYNCFREQ13' 
-- Equation name is 'SYNCFREQ13', type is output 
SYNCFREQ13 =  pipefw25;

-- Node name is 'SYNCFREQ14' 
-- Equation name is 'SYNCFREQ14', type is output 
SYNCFREQ14 =  pipefw26;

-- Node name is 'SYNCFREQ15' 
-- Equation name is 'SYNCFREQ15', type is output 
SYNCFREQ15 =  pipefw27;

-- Node name is 'SYNCFREQ16' 
-- Equation name is 'SYNCFREQ16', type is output 
SYNCFREQ16 =  pipefw30;

-- Node name is 'SYNCFREQ17' 
-- Equation name is 'SYNCFREQ17', type is output 
SYNCFREQ17 =  pipefw31;

-- Node name is 'SYNCFREQ18' 
-- Equation name is 'SYNCFREQ18', type is output 
SYNCFREQ18 =  pipefw32;

-- Node name is 'SYNCFREQ19' 
-- Equation name is 'SYNCFREQ19', type is output 
SYNCFREQ19 =  pipefw33;

-- Node name is 'SYNCFREQ20' 
-- Equation name is 'SYNCFREQ20', type is output 
SYNCFREQ20 =  pipefw34;

-- Node name is 'SYNCFREQ21' 
-- Equation name is 'SYNCFREQ21', type is output 
SYNCFREQ21 =  pipefw35;

-- Node name is 'SYNCFREQ22' 
-- Equation name is 'SYNCFREQ22', type is output 
SYNCFREQ22 =  pipefw36;

-- Node name is 'SYNCFREQ23' 
-- Equation name is 'SYNCFREQ23', type is output 
SYNCFREQ23 =  pipefw37;

-- Node name is 'SYNCFREQ24' 
-- Equation name is 'SYNCFREQ24', type is output 
SYNCFREQ24 =  pipefw40;

-- Node name is 'SYNCFREQ25' 
-- Equation name is 'SYNCFREQ25', type is output 
SYNCFREQ25 =  pipefw41;

-- Node name is 'SYNCFREQ26' 
-- Equation name is 'SYNCFREQ26', type is output 
SYNCFREQ26 =  pipefw42;

-- Node name is 'SYNCFREQ27' 
-- Equation name is 'SYNCFREQ27', type is output 
SYNCFREQ27 =  pipefw43;

-- Node name is 'SYNCFREQ28' 
-- Equation name is 'SYNCFREQ28', type is output 
SYNCFREQ28 =  pipefw44;

-- Node name is 'SYNCFREQ29' 
-- Equation name is 'SYNCFREQ29', type is output 
SYNCFREQ29 =  pipefw45;

-- Node name is 'SYNCFREQ30' 
-- Equation name is 'SYNCFREQ30', type is output 
SYNCFREQ30 =  pipefw46;

-- Node name is 'SYNCFREQ31' 
-- Equation name is 'SYNCFREQ31', type is output 
SYNCFREQ31 =  pipefw47;



Project Information                                     f:\dds2\dds\loadfw.rpt

** COMPILATION SETTINGS & TIMES **

Processing Menu Commands
------------------------

Design Doctor                             = off

Logic Synthesis:

   Synthesis Type Used                    = Multi-Level

   Default Synthesis Style                = NORMAL

      Logic option settings in 'NORMAL' style for 'FLEX10K' family

      CARRY_CHAIN                         = ignore
      CARRY_CHAIN_LENGTH                  = 32
      CASCADE_CHAIN                       = ignore
      CASCADE_CHAIN_LENGTH                = 2
      DECOMPOSE_GATES                     = on
      DUPLICATE_LOGIC_EXTRACTION          = on
      MINIMIZATION                        = full
      MULTI_LEVEL_FACTORING               = on
      NOT_GATE_PUSH_BACK                  = on
      REDUCE_LOGIC                        = on
      REFACTORIZATION                     = on
      REGISTER_OPTIMIZATION               = on
      RESYNTHESIZE_NETWORK                = on
      SLOW_SLEW_RATE                      = off
      SUBFACTOR_EXTRACTION                = on
      IGNORE_SOFT_BUFFERS                 = on
      USE_LPM_FOR_AHDL_OPERATORS          = off

   Other logic synthesis settings:

      Automatic Global Clock              = on
      Automatic Global Clear              = on
      Automatic Global Preset             = on
      Automatic Global Output Enable      = on
      Automatic Fast I/O                  = off
      Automatic Register Packing          = off
      Automatic Open-Drain Pins           = on
      Automatic Implement in EAB          = off
      Optimize                            = 5

Default Timing Specifications: None

Cut All Bidir Feedback Timing Paths       = on
Cut All Clear & Preset Timing Paths       = on

Ignore Timing Assignments                 = off

Functional SNF Extractor                  = off

Linked SNF Extractor                      = off
Timing SNF Extractor                      = on
Optimize Timing SNF                       = off
Generate AHDL TDO File                    = off
Fitter Settings                           = NORMAL
Use Quartus Fitter                        = on
Smart Recompile                           = off
Total Recompile                           = off

Interfaces Menu Commands
------------------------

EDIF Netlist Writer                       = off
Verilog Netlist Writer                    = off
VHDL Netlist Writer                       = off

Compilation Times
-----------------

   Compiler Netlist Extractor             00:00:00
   Database Builder                       00:00:00
   Logic Synthesizer                      00:00:01
   Partitioner                            00:00:00
   Fitter                                 00:00:01
   Timing SNF Extractor                   00:00:00
   Assembler                              00:00:00
   --------------------------             --------
   Total Time                             00:00:02


Memory Allocated
-----------------

Peak memory allocated during compilation  = 16,199K