ram_test.cr.mti

FPGA设计初级班和提高班培训课堂PPT；实验的源代码；实验指导书！

{E:/farsight_fpga_course/code/high/onchip ram/test/simulation/modelsim/ram_top.v} {1 {vlog -work work1 -vlog01compat {E:/farsight_fpga_course/code/high/onchip ram/test/simulation/modelsim/ram_top.v}
Model Technology ModelSim SE vlog 6.0 Compiler 2004.08 Aug 19 2004
-- Compiling module ram_top

Top level modules:
	ram_top

} {} {}} {E:/farsight_fpga_course/code/high/onchip ram/test/simulation/modelsim/ram_control.vo} {1 {vlog -work work1 -vlog01compat {E:/farsight_fpga_course/code/high/onchip ram/test/simulation/modelsim/ram_control.vo}
Model Technology ModelSim SE vlog 6.0 Compiler 2004.08 Aug 19 2004
-- Compiling module ram_control

Top level modules:
	ram_control

} {} {}} {E:/farsight_fpga_course/code/high/onchip ram/test/simulation/modelsim/altera_mf.v} {1 {vlog -work work1 -vlog01compat {E:/farsight_fpga_course/code/high/onchip ram/test/simulation/modelsim/altera_mf.v}
Model Technology ModelSim SE vlog 6.0 Compiler 2004.08 Aug 19 2004
-- Compiling module lcell
-- Compiling module global
-- Compiling module carry
-- Compiling module cascade
-- Compiling module carry_sum
-- Compiling module exp
-- Compiling module soft
-- Compiling module opndrn
-- Compiling module row_global
-- Compiling module prim_gdff
-- Compiling module dffea
-- Compiling module dffeas
-- Compiling module ALTERA_DEVICE_FAMILIES
-- Compiling module dffp
-- Compiling module stx_m_cntr
-- Compiling module stx_n_cntr
-- Compiling module stx_scale_cntr
-- Compiling module MF_pll_reg
-- Compiling module MF_stratix_pll
-- Compiling module arm_m_cntr
-- Compiling module arm_n_cntr
-- Compiling module arm_scale_cntr
-- Compiling module MF_stratixii_pll
-- Compiling module altpll
-- Compiling module altaccumulate
-- Compiling module altmult_accum
-- Compiling module altmult_add
-- Compiling module altfp_mult
-- Compiling module altsqrt
-- Compiling module altclklock
-- Compiling module altddio_in
-- Compiling module altddio_out
-- Compiling module altddio_bidir
-- Compiling module hssi_pll
-- Compiling module MF_ram7x20_syn
-- Compiling module hssi_fifo
-- Compiling module hssi_rx
-- Compiling module hssi_tx
-- Compiling module altcdr_rx
-- Compiling module altcdr_tx
-- Compiling module altlvds_rx
-- Compiling module stratix_lvds_rx
-- Compiling module stratixgx_dpa_lvds_rx
-- Compiling module stratixii_lvds_rx
-- Compiling module flexible_lvds_rx
-- Compiling module altlvds_tx
-- Compiling module stratix_tx_outclk
-- Compiling module stratixii_tx_outclk
-- Compiling module flexible_lvds_tx
-- Compiling module altcam
-- Compiling module altdpram
-- Compiling module altsyncram
-- Compiling module alt3pram
-- Compiling module altqpram
-- Compiling module parallel_add
-- Compiling module scfifo
-- Compiling module dcfifo_dffpipe
-- Compiling module dcfifo_fefifo
-- Compiling module dcfifo_async
-- Compiling module dcfifo_sync
-- Compiling module dcfifo_low_latency
-- Compiling module dcfifo
-- Compiling module altshift_taps
-- Compiling module a_graycounter
-- Compiling module alt_exc_dpram
-- Compiling module alt_exc_upcore
-- Compiling module altsquare

Top level modules:
	lcell
	global
	carry
	cascade
	carry_sum
	exp
	soft
	opndrn
	row_global
	dffea
	dffeas
	altpll
	altaccumulate
	altmult_accum
	altmult_add
	altfp_mult
	altsqrt
	altddio_bidir
	altcdr_rx
	altcdr_tx
	altlvds_rx
	altlvds_tx
	altcam
	altdpram
	alt3pram
	altqpram
	parallel_add
	scfifo
	dcfifo
	altshift_taps
	a_graycounter
	alt_exc_dpram
	alt_exc_upcore
	altsquare

} {} {}} {E:/farsight_fpga_course/code/high/onchip ram/test/simulation/modelsim/cyclone_atoms.v} {1 {vlog -work work1 -vlog01compat {E:/farsight_fpga_course/code/high/onchip ram/test/simulation/modelsim/cyclone_atoms.v}
Model Technology ModelSim SE vlog 6.0 Compiler 2004.08 Aug 19 2004
-- Compiling UDP CYCLONE_PRIM_DFFE
-- Compiling module cyclone_dffe
-- Compiling module cyclone_latch
-- Compiling module cyclone_mux21
-- Compiling module cyclone_mux41
-- Compiling module cyclone_and1
-- Compiling module cyclone_and16
-- Compiling module cyclone_bmux21
-- Compiling module cyclone_b17mux21
-- Compiling module cyclone_nmux21
-- Compiling module cyclone_b5mux21
-- Compiling module cyclone_asynch_lcell
-- Compiling module cyclone_lcell_register
-- Compiling module cyclone_lcell
-- Compiling module cyclone_ram_pulse_generator
-- Compiling module cyclone_ram_register
-- Compiling module cyclone_ram_block
-- Compiling module cyclone_m_cntr
-- Compiling module cyclone_n_cntr
-- Compiling module cyclone_scale_cntr
-- Compiling module cyclone_pll_reg
-- Compiling module cyclone_pll
-- Compiling module cyclone_dll
-- Compiling module cyclone_jtag
-- Compiling module cyclone_crcblock
-- Compiling module cyclone_routing_wire
-- Compiling module cyclone_asynch_io
-- Compiling module cyclone_io
-- Compiling module cyclone_asmiblock

Top level modules:
	cyclone_latch
	cyclone_mux41
	cyclone_and1
	cyclone_and16
	cyclone_bmux21
	cyclone_b17mux21
	cyclone_nmux21
	cyclone_b5mux21
	cyclone_lcell
	cyclone_ram_block
	cyclone_pll
	cyclone_dll
	cyclone_jtag
	cyclone_crcblock
	cyclone_routing_wire
	cyclone_io
	cyclone_asmiblock

} {} {}}