test.map.eqn

FPGA串口界面调试程序,用VHDL语言实现

--operation mode is normal

B1_RAM1[7][7]_lut_out = B1_Dout[7];
B1_RAM1[7][7] = DFFEAS(B1_RAM1[7][7]_lut_out, !B1_D_enp, VCC, , B1L013, , , , );


--B1L941 is rs422:inst|Mux~1070
--operation mode is normal

B1L941 = dsp0_addr[0] & (B1L841 & (B1_RAM1[7][7]) # !B1L841 & B1_RAM1[5][7]) # !dsp0_addr[0] & (B1L841);


--B1_RAM1[1][7] is rs422:inst|RAM1[1][7]
--operation mode is normal

B1_RAM1[1][7]_lut_out = B1_Dout[7];
B1_RAM1[1][7] = DFFEAS(B1_RAM1[1][7]_lut_out, !B1_D_enp, VCC, , B1L052, , , , );


--B1_RAM1[0][7] is rs422:inst|RAM1[0][7]
--operation mode is normal

B1_RAM1[0][7]_lut_out = B1_Dout[7];
B1_RAM1[0][7] = DFFEAS(B1_RAM1[0][7]_lut_out, !B1_D_enp, VCC, , B1L042, , , , );


--B1L051 is rs422:inst|Mux~1071
--operation mode is normal

B1L051 = dsp0_addr[1] & (dsp0_addr[0]) # !dsp0_addr[1] & (dsp0_addr[0] & B1_RAM1[1][7] # !dsp0_addr[0] & (B1_RAM1[0][7]));


--B1L151 is rs422:inst|Mux~1072
--operation mode is normal

B1L151 = dsp0_addr[1] & (B1L051 & (B1_RAM1[3][7]) # !B1L051 & B1_RAM1[2][7]) # !dsp0_addr[1] & (B1L051);


--B1L251 is rs422:inst|Mux~1073
--operation mode is normal

B1L251 = dsp0_addr[3] & (dsp0_addr[2]) # !dsp0_addr[3] & (dsp0_addr[2] & B1L941 # !dsp0_addr[2] & (B1L151));


--B1_RAM1[13][7] is rs422:inst|RAM1[13][7]
--operation mode is normal

B1_RAM1[13][7]_lut_out = B1_Dout[7];
B1_RAM1[13][7] = DFFEAS(B1_RAM1[13][7]_lut_out, !B1_D_enp, VCC, , B1L073, , , , );


--B1_RAM1[12][7] is rs422:inst|RAM1[12][7]
--operation mode is normal

B1_RAM1[12][7]_lut_out = B1_Dout[7];
B1_RAM1[12][7] = DFFEAS(B1_RAM1[12][7]_lut_out, !B1_D_enp, VCC, , B1L063, , , , );


--B1L351 is rs422:inst|Mux~1074
--operation mode is normal

B1L351 = dsp0_addr[0] & B1_RAM1[13][7] # !dsp0_addr[0] & (B1_RAM1[12][7]);


--B1_RAM1[14][7] is rs422:inst|RAM1[14][7]
--operation mode is normal

B1_RAM1[14][7]_lut_out = B1_Dout[7];
B1_RAM1[14][7] = DFFEAS(B1_RAM1[14][7]_lut_out, !B1_D_enp, VCC, , B1L083, , , , );


--B1L451 is rs422:inst|Mux~1075
--operation mode is normal

B1L451 = dsp0_addr[1] & (B1_RAM1[14][7] & !dsp0_addr[0]) # !dsp0_addr[1] & B1L351;


--B1_RAM1[9][6] is rs422:inst|RAM1[9][6]
--operation mode is normal

B1_RAM1[9][6]_lut_out = B1_Dout[6];
B1_RAM1[9][6] = DFFEAS(B1_RAM1[9][6]_lut_out, !B1_D_enp, VCC, , B1L033, , , , );


--B1_RAM1[5][6] is rs422:inst|RAM1[5][6]
--operation mode is normal

B1_RAM1[5][6]_lut_out = B1_Dout[6];
B1_RAM1[5][6] = DFFEAS(B1_RAM1[5][6]_lut_out, !B1_D_enp, VCC, , B1L092, , , , );


--B1_RAM1[1][6] is rs422:inst|RAM1[1][6]
--operation mode is normal

B1_RAM1[1][6]_lut_out = B1_Dout[6];
B1_RAM1[1][6] = DFFEAS(B1_RAM1[1][6]_lut_out, !B1_D_enp, VCC, , B1L052, , , , );


--B1L551 is rs422:inst|Mux~1078
--operation mode is normal

B1L551 = dsp0_addr[3] & (dsp0_addr[2]) # !dsp0_addr[3] & (dsp0_addr[2] & B1_RAM1[5][6] # !dsp0_addr[2] & (B1_RAM1[1][6]));


--B1_RAM1[13][6] is rs422:inst|RAM1[13][6]
--operation mode is normal

B1_RAM1[13][6]_lut_out = B1_Dout[6];
B1_RAM1[13][6] = DFFEAS(B1_RAM1[13][6]_lut_out, !B1_D_enp, VCC, , B1L073, , , , );


--B1L651 is rs422:inst|Mux~1079
--operation mode is normal

B1L651 = dsp0_addr[3] & (B1L551 & (B1_RAM1[13][6]) # !B1L551 & B1_RAM1[9][6]) # !dsp0_addr[3] & (B1L551);


--B1_RAM1[6][6] is rs422:inst|RAM1[6][6]
--operation mode is normal

B1_RAM1[6][6]_lut_out = B1_Dout[6];
B1_RAM1[6][6] = DFFEAS(B1_RAM1[6][6]_lut_out, !B1_D_enp, VCC, , B1L003, , , , );


--B1_RAM1[10][6] is rs422:inst|RAM1[10][6]
--operation mode is normal

B1_RAM1[10][6]_lut_out = B1_Dout[6];
B1_RAM1[10][6] = DFFEAS(B1_RAM1[10][6]_lut_out, !B1_D_enp, VCC, , B1L043, , , , );


--B1L751 is rs422:inst|Mux~1080
--operation mode is normal

B1L751 = dsp0_addr[2] & (dsp0_addr[3]) # !dsp0_addr[2] & (dsp0_addr[3] & B1_RAM1[10][6] # !dsp0_addr[3] & (B1_RAM1[2][6]));


--B1_RAM1[14][6] is rs422:inst|RAM1[14][6]
--operation mode is normal

B1_RAM1[14][6]_lut_out = B1_Dout[6];
B1_RAM1[14][6] = DFFEAS(B1_RAM1[14][6]_lut_out, !B1_D_enp, VCC, , B1L083, , , , );


--B1L851 is rs422:inst|Mux~1081
--operation mode is normal

B1L851 = dsp0_addr[2] & (B1L751 & (B1_RAM1[14][6]) # !B1L751 & B1_RAM1[6][6]) # !dsp0_addr[2] & (B1L751);


--B1_RAM1[4][6] is rs422:inst|RAM1[4][6]
--operation mode is normal

B1_RAM1[4][6]_lut_out = B1_Dout[6];
B1_RAM1[4][6] = DFFEAS(B1_RAM1[4][6]_lut_out, !B1_D_enp, VCC, , B1L082, , , , );


--B1_RAM1[8][6] is rs422:inst|RAM1[8][6]
--operation mode is normal

B1_RAM1[8][6]_lut_out = B1_Dout[6];
B1_RAM1[8][6] = DFFEAS(B1_RAM1[8][6]_lut_out, !B1_D_enp, VCC, , B1L023, , , , );


--B1_RAM1[0][6] is rs422:inst|RAM1[0][6]
--operation mode is normal

B1_RAM1[0][6]_lut_out = B1_Dout[6];
B1_RAM1[0][6] = DFFEAS(B1_RAM1[0][6]_lut_out, !B1_D_enp, VCC, , B1L042, , , , );


--B1L951 is rs422:inst|Mux~1082
--operation mode is normal

B1L951 = dsp0_addr[2] & (dsp0_addr[3]) # !dsp0_addr[2] & (dsp0_addr[3] & B1_RAM1[8][6] # !dsp0_addr[3] & (B1_RAM1[0][6]));


--B1_RAM1[12][6] is rs422:inst|RAM1[12][6]
--operation mode is normal

B1_RAM1[12][6]_lut_out = B1_Dout[6];
B1_RAM1[12][6] = DFFEAS(B1_RAM1[12][6]_lut_out, !B1_D_enp, VCC, , B1L063, , , , );


--B1L061 is rs422:inst|Mux~1083
--operation mode is normal

B1L061 = dsp0_addr[2] & (B1L951 & (B1_RAM1[12][6]) # !B1L951 & B1_RAM1[4][6]) # !dsp0_addr[2] & (B1L951);


--B1L161 is rs422:inst|Mux~1084
--operation mode is normal

B1L161 = dsp0_addr[0] & (dsp0_addr[1]) # !dsp0_addr[0] & (dsp0_addr[1] & B1L851 # !dsp0_addr[1] & (B1L061));


--B1_RAM1[7][6] is rs422:inst|RAM1[7][6]
--operation mode is normal

B1_RAM1[7][6]_lut_out = B1_Dout[6];
B1_RAM1[7][6] = DFFEAS(B1_RAM1[7][6]_lut_out, !B1_D_enp, VCC, , B1L013, , , , );


--B1L261 is rs422:inst|Mux~1085
--operation mode is normal

B1L261 = dsp0_addr[2] & B1_RAM1[7][6] # !dsp0_addr[2] & (B1_RAM1[3][6]);


--B1_RAM1[11][6] is rs422:inst|RAM1[11][6]
--operation mode is normal

B1_RAM1[11][6]_lut_out = B1_Dout[6];
B1_RAM1[11][6] = DFFEAS(B1_RAM1[11][6]_lut_out, !B1_D_enp, VCC, , B1L053, , , , );


--B1L361 is rs422:inst|Mux~1086
--operation mode is normal

B1L361 = dsp0_addr[3] & (B1_RAM1[11][6] & !dsp0_addr[2]) # !dsp0_addr[3] & B1L261;


--B1_RAM1[10][5] is rs422:inst|RAM1[10][5]
--operation mode is normal

B1_RAM1[10][5]_lut_out = B1_Dout[5];
B1_RAM1[10][5] = DFFEAS(B1_RAM1[10][5]_lut_out, !B1_D_enp, VCC, , B1L043, , , , );


--B1_RAM1[9][5] is rs422:inst|RAM1[9][5]
--operation mode is normal

B1_RAM1[9][5]_lut_out = B1_Dout[5];
B1_RAM1[9][5] = DFFEAS(B1_RAM1[9][5]_lut_out, !B1_D_enp, VCC, , B1L033, , , , );


--B1_RAM1[8][5] is rs422:inst|RAM1[8][5]
--operation mode is normal

B1_RAM1[8][5]_lut_out = B1_Dout[5];
B1_RAM1[8][5] = DFFEAS(B1_RAM1[8][5]_lut_out, !B1_D_enp, VCC, , B1L023, , , , );


--B1L461 is rs422:inst|Mux~1088
--operation mode is normal

B1L461 = dsp0_addr[1] & (dsp0_addr[0]) # !dsp0_addr[1] & (dsp0_addr[0] & B1_RAM1[9][5] # !dsp0_addr[0] & (B1_RAM1[8][5]));


--B1_RAM1[11][5] is rs422:inst|RAM1[11][5]
--operation mode is normal

B1_RAM1[11][5]_lut_out = B1_Dout[5];
B1_RAM1[11][5] = DFFEAS(B1_RAM1[11][5]_lut_out, !B1_D_enp, VCC, , B1L053, , , , );


--B1L561 is rs422:inst|Mux~1089
--operation mode is normal

B1L561 = dsp0_addr[1] & (B1L461 & (B1_RAM1[11][5]) # !B1L461 & B1_RAM1[10][5]) # !dsp0_addr[1] & (B1L461);


--B1_RAM1[5][5] is rs422:inst|RAM1[5][5]
--operation mode is normal

B1_RAM1[5][5]_lut_out = B1_Dout[5];
B1_RAM1[5][5] = DFFEAS(B1_RAM1[5][5]_lut_out, !B1_D_enp, VCC, , B1L092, , , , );


--B1_RAM1[6][5] is rs422:inst|RAM1[6][5]
--operation mode is normal

B1_RAM1[6][5]_lut_out = B1_Dout[5];
B1_RAM1[6][5] = DFFEAS(B1_RAM1[6][5]_lut_out, !B1_D_enp, VCC, , B1L003, , , , );


--B1_RAM1[4][5] is rs422:inst|RAM1[4][5]
--operation mode is normal

B1_RAM1[4][5]_lut_out = B1_Dout[5];
B1_RAM1[4][5] = DFFEAS(B1_RAM1[4][5]_lut_out, !B1_D_enp, VCC, , B1L082, , , , );


--B1L661 is rs422:inst|Mux~1090
--operation mode is normal

B1L661 = dsp0_addr[0] & (dsp0_addr[1]) # !dsp0_addr[0] & (dsp0_addr[1] & B1_RAM1[6][5] # !dsp0_addr[1] & (B1_RAM1[4][5]));


--B1_RAM1[7][5] is rs422:inst|RAM1[7][5]
--operation mode is normal

B1_RAM1[7][5]_lut_out = B1_Dout[5];
B1_RAM1[7][5] = DFFEAS(B1_RAM1[7][5]_lut_out, !B1_D_enp, VCC, , B1L013, , , , );


--B1L761 is rs422:inst|Mux~1091
--operation mode is normal

B1L761 = dsp0_addr[0] & (B1L661 & (B1_RAM1[7][5]) # !B1L661 & B1_RAM1[5][5]) # !dsp0_addr[0] & (B1L661);


--B1_RAM1[1][5] is rs422:inst|RAM1[1][5]
--operation mode is normal

B1_RAM1[1][5]_lut_out = B1_Dout[5];
B1_RAM1[1][5] = DFFEAS(B1_RAM1[1][5]_lut_out, !B1_D_enp, VCC, , B1L052, , , , );


--B1_RAM1[0][5] is rs422:inst|RAM1[0][5]
--operation mode is normal

B1_RAM1[0][5]_lut_out = B1_Dout[5];
B1_RAM1[0][5] = DFFEAS(B1_RAM1[0][5]_lut_out, !B1_D_enp, VCC, , B1L042, , , , );


--B1L861 is rs422:inst|Mux~1092
--operation mode is normal

B1L861 = dsp0_addr[1] & (dsp0_addr[0]) # !dsp0_addr[1] & (dsp0_addr[0] & B1_RAM1[1][5] # !dsp0_addr[0] & (B1_RAM1[0][5]));


--B1L961 is rs422:inst|Mux~1093
--operation mode is normal

B1L961 = dsp0_addr[1] & (B1L861 & (B1_RAM1[3][5]) # !B1L861 & B1_RAM1[2][5]) # !dsp0_addr[1] & (B1L861);


--B1L071 is rs422:inst|Mux~1094
--operation mode is normal

B1L071 = dsp0_addr[3] & (dsp0_addr[2]) # !dsp0_addr[3] & (dsp0_addr[2] & B1L761 # !dsp0_addr[2] & (B1L961));


--B1_RAM1[13][5] is rs422:inst|RAM1[13][5]
--operation mode is normal

B1_RAM1[13][5]_lut_out = B1_Dout[5];
B1_RAM1[13][5] = DFFEAS(B1_RAM1[13][5]_lut_out, !B1_D_enp, VCC, , B1L073, , , , );


--B1_RAM1[12][5] is rs422:inst|RAM1[12][5]
--operation mode is normal

B1_RAM1[12][5]_lut_out = B1_Dout[5];
B1_RAM1[12][5] = DFFEAS(B1_RAM1[12][5]_lut_out, !B1_D_enp, VCC, , B1L063, , , , );


--B1L171 is rs422:inst|Mux~1095
--operation mode is normal

B1L171 = dsp0_addr[0] & B1_RAM1[13][5] # !dsp0_addr[0] & (B1_RAM1[12][5]);


--B1_RAM1[14][5] is rs422:inst|RAM1[14][5]
--operation mode is normal

B1_RAM1[14][5]_lut_out = B1_Dout[5];
B1_RAM1[14][5] = DFFEAS(B1_RAM1[14][5]_lut_out, !B1_D_enp, VCC, , B1L083, , , , );


--B1L271 is rs422:inst|Mux~1096
--operation mode is normal

B1L271 = dsp0_addr[1] & (B1_RAM1[14][5] & !dsp0_addr[0]) # !dsp0_addr[1] & B1L171;


--B1_RAM1[9][4] is rs422:inst|RAM1[9][4]
--operation mode is normal

B1_RAM1[9][4]_lut_out = B1_Dout[4];
B1_RAM1[9][4] = DFFEAS(B1_RAM1[9][4]_lut_out, !B1_D_enp, VCC, , B1L033, , , , );


--B1_RAM1[5][4] is rs422:inst|RAM1[5][4]
--operation mode is normal

B1_RAM1[5][4]_lut_out = B1_Dout[4];
B1_RAM1[5][4] = DFFEAS(B1_RAM1[5][4]_lut_out, !B1_D_enp, VCC, , B1L092, , , , );


--B1_RAM1[1][4] is rs422:inst|RAM1[1][4]
--operation mode is normal

B1_RAM1[1][4]_lut_out = B1_Dout[4];
B1_RAM1[1][4] = DFFEAS(B1_RAM1[1][4]_lut_out, !B1_D_enp, VCC, , B1L052, , , , );


--B1L371 is rs422:inst|Mux~1098
--operation mode is normal

B1L371 = dsp0_addr[3] & (dsp0_addr[2]) # !dsp0_addr[3] & (dsp0_addr[2] & B1_RAM1[5][4] # !dsp0_addr[2] & (B1_RAM1[1][4]));


--B1_RAM1[13][4] is rs422:inst|RAM1[13][4]
--operation mode is normal

B1_RAM1[13][4]_lut_out = B1_Dout[4];
B1_RAM1[13][4] = DFFEAS(B1_RAM1[13][4]_lut_out, !B1_D_enp, VCC, , B1L073, , , , );


--B1L471 is rs422:inst|Mux~1099
--operation mode is normal

B1L471 = dsp0_addr[3] & (B1L371 & (B1_RAM1[13][4]) # !B1L371 & B1_RAM1[9][4]) # !dsp0_addr[3] & (B1L371);


--B1_RAM1[6][4] is rs422:inst|RAM1[6][4]
--operation mode is normal

B1_RAM1[6][4]_lut_out = B1_Dout[4];
B1_RAM1[6][4] = DFFEAS(B1_RAM1[6][4]_lut_out, !B1_D_enp, VCC, , B1L003, , , , );


--B1_RAM1[10][4] is rs422:inst|RAM1[10][4]
--operation mode is normal

B1_RAM1[10][4]_lut_out = B1_Dout[4];
B1_RAM1[10][4] = DFFEAS(B1_RAM1[10][4]_lut_out, !B1_D_enp, VCC, , B1L043, , , , );


--B1L571 is rs422:inst|Mux~1100
--operation mode is normal

B1L571 = dsp0_addr[2] & (dsp0_addr[3]) # !dsp0_addr[2] & (dsp0_addr[3] & B1_RAM1[10][4] # !dsp0_addr[3] & (B1_RAM1[2][4]));


--B1_RAM1[14][4] is rs422:inst|RAM1[14][4]
--operation mode is normal

B1_RAM1[14][4]_lut_out = B1_Dout[4];
B1_RAM1[14][4] = DFFEAS(B1_RAM1[14][4]_lut_out, !B1_D_enp, VCC, , B1L083, , , , );


--B1L671 is rs422:inst|Mux~1101
--operation mode is normal

B1L671 = dsp0_addr[2] & (B1L571 & (B1_RAM1[14][4]) # !B1L571 & B1_RAM1[6][4]) # !dsp0_addr[2] & (B1L571);


--B1_RAM1[4][4] is rs422:inst|RAM1[4][4]
--operation mode is normal

B1_RAM1[4][4]_lut_out = B1_Dout[4];
B1_RAM1[4][4] = DFFEAS(B1_RAM1[4][4]_lut_out, !B1_D_enp, VCC, , B1L082, , , , );


--B1_RAM1[8][4] is rs422:inst|RAM1[8][4]
--operation mode is normal

B1_RAM1[8][4]_lut_out = B1_Dout[4];
B1_RAM1[8][4] = DFFEAS(B1_RAM1[8][4]_lut_out, !B1_D_enp, VCC, , B1L023, , , , );


--B1_RAM1[0][4] is rs422:inst|RAM1[0][4]
--operation mode is normal

B1_RAM1[0][4]_lut_out = B1_Dout[4];
B1_RAM1[0][4] = DFFEAS(B1_RAM1[0][4]_lut_out, !B1_D_enp, VCC, , B1L042, , , , );


--B1L771 is rs422:inst|Mux~1102
--operation mode is normal

B1L771 = dsp0_addr[2] & (dsp0_addr[3]) # !dsp0_addr[2] & (dsp0_addr[3] & B1_RAM1[8][4] # !dsp0_addr[3] & (B1_RAM1[0][4]));


--B1_RAM1[12][4] is rs422:inst|RAM1[12][4]
--operation mode is normal

B1_RAM1[12][4]_lut_out = B1_Dout[4];
B1_RAM1[12][4] = DFFEAS(B1_RAM1[12][4]_lut_out, !B1_D_enp, VCC, , B1L063, , , , );


--B1L871 is rs422:inst|Mux~1103
--operation mode is normal

B1L871 = dsp0_addr[2] & (B1L771 & (B1_RAM1[12][4]) # !B1L771 & B1_RAM1[4][4]) # !dsp0_addr[2] & (B1L771);


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