test.fit.eqn

FPGA串口界面调试程序,用VHDL语言实现

B1L93 = B1L04;


--B1L24 is rs422:inst|add~747 at LC_X9_Y19_N3
--operation mode is arithmetic

B1L24 = B1_Dsum1[3] $ B1_Dout[3] $ B1L64;

--B1L34 is rs422:inst|add~749 at LC_X9_Y19_N3
--operation mode is arithmetic

B1L34_cout_0 = B1_Dsum1[3] & !B1_Dout[3] & !B1L64 # !B1_Dsum1[3] & (!B1L64 # !B1_Dout[3]);
B1L34 = CARRY(B1L34_cout_0);

--B1L44 is rs422:inst|add~749COUT1_779 at LC_X9_Y19_N3
--operation mode is arithmetic

B1L44_cout_1 = B1_Dsum1[3] & !B1_Dout[3] & !B1L74 # !B1_Dsum1[3] & (!B1L74 # !B1_Dout[3]);
B1L44 = CARRY(B1L44_cout_1);


--B1L54 is rs422:inst|add~752 at LC_X9_Y19_N2
--operation mode is arithmetic

B1L54 = B1_Dout[2] $ B1_Dsum1[2] $ !B1L94;

--B1L64 is rs422:inst|add~754 at LC_X9_Y19_N2
--operation mode is arithmetic

B1L64_cout_0 = B1_Dout[2] & (B1_Dsum1[2] # !B1L94) # !B1_Dout[2] & B1_Dsum1[2] & !B1L94;
B1L64 = CARRY(B1L64_cout_0);

--B1L74 is rs422:inst|add~754COUT1_778 at LC_X9_Y19_N2
--operation mode is arithmetic

B1L74_cout_1 = B1_Dout[2] & (B1_Dsum1[2] # !B1L05) # !B1_Dout[2] & B1_Dsum1[2] & !B1L05;
B1L74 = CARRY(B1L74_cout_1);


--B1L84 is rs422:inst|add~757 at LC_X9_Y19_N1
--operation mode is arithmetic

B1L84 = B1_Dsum1[1] $ B1_Dout[1] $ B1L6;

--B1L94 is rs422:inst|add~759 at LC_X9_Y19_N1
--operation mode is arithmetic

B1L94_cout_0 = B1_Dsum1[1] & !B1_Dout[1] & !B1L6 # !B1_Dsum1[1] & (!B1L6 # !B1_Dout[1]);
B1L94 = CARRY(B1L94_cout_0);

--B1L05 is rs422:inst|add~759COUT1_776 at LC_X9_Y19_N1
--operation mode is arithmetic

B1L05_cout_1 = B1_Dsum1[1] & !B1_Dout[1] & !B1L7 # !B1_Dsum1[1] & (!B1L7 # !B1_Dout[1]);
B1L05 = CARRY(B1L05_cout_1);


--A1L011 is rtl~28 at LC_X6_Y20_N8
--operation mode is normal

A1L011 = B1L342 & !B1L542 & (B1_Dout[2] $ B1_Dout[3]);


--A1L111 is rtl~29 at LC_X5_Y18_N7
--operation mode is normal

A1L111 = B1L751 # !A1L021 # !B1L934;


--B1L241 is rs422:inst|LENGTH1_1~120 at LC_X6_Y18_N7
--operation mode is normal

B1L241 = B1L934 & (A1L021 & (B1_LENGTH1_1[0]) # !A1L021 & !B1L431);


--B1L941 is rs422:inst|LENGTH1_2~352 at LC_X6_Y20_N5
--operation mode is normal

B1L941 = B1L342 & (B1L542 & (B1_LENGTH1_2[2]) # !B1L542 & !B1_Dout[2]) # !B1L342 & (B1_LENGTH1_2[2]);


--B1L051 is rs422:inst|LENGTH1_2~354 at LC_X5_Y22_N6
--operation mode is normal

B1L051 = B1L542 & B1_LENGTH1_2[1] # !B1L542 & (B1L342 & (B1_Dout[1]) # !B1L342 & B1_LENGTH1_2[1]);


--B1L151 is rs422:inst|LENGTH1_2~356 at LC_X6_Y20_N4
--operation mode is normal

B1L151 = B1L342 & (B1L542 & B1_LENGTH1_2[0] # !B1L542 & (B1_Dout[0])) # !B1L342 & B1_LENGTH1_2[0];


--B1L68 is rs422:inst|Decoder~187 at LC_X3_Y18_N3
--operation mode is normal

B1L68 = B1_WP[1] & !B1_WP[2] & !B1_WP[0] & !B1_WP[3];


--B1L672 is rs422:inst|RAM1[2][7]~1305 at LC_X6_Y18_N0
--operation mode is normal

B1L672 = B1L38 & (B1L68);


--B1L78 is rs422:inst|Decoder~188 at LC_X3_Y19_N2
--operation mode is normal

B1L78 = !B1_WP[2] & B1_WP[1] & B1_WP[0] & !B1_WP[3];


--B1L682 is rs422:inst|RAM1[3][7]~1306 at LC_X5_Y19_N3
--operation mode is normal

B1L682 = B1L38 & (B1L78);


--D1_clk_19_2k is clk:inst12|clk_19_2k at LC_X1_Y18_N2
--operation mode is normal

D1_clk_19_2k_lut_out = D1_count1[10] # D1_count1[9] & (D1_count1[8] # !D1L431);
D1_clk_19_2k = DFFEAS(D1_clk_19_2k_lut_out, !GLOBAL(G1__clk0), VCC, , , , , , );


--D1L521 is clk:inst12|LessThan~1225 at LC_X18_Y40_N9
--operation mode is normal

D1L521 = D1_count3[2] & D1_count3[5] & D1_count3[4] & D1_count3[3];


--D1_tag0 is clk:inst12|tag0 at LC_X19_Y40_N0
--operation mode is normal

D1_tag0_lut_out = D1_tag0 & !D1L521 # !D1_CLK200K;
D1_tag0 = DFFEAS(D1_tag0_lut_out, !GLOBAL(D1_clk_19_2k), VCC, , , , , , );


--A1L211 is rtl~32 at LC_X18_Y40_N7
--operation mode is normal

A1L211 = D1_tag0 # !D1_CLK200K;


--A1L311 is rtl~33 at LC_X5_Y18_N0
--operation mode is normal

A1L311 = B1L442 & !B1L932;


--B1L061 is rs422:inst|LessThan~689 at LC_X3_Y18_N2
--operation mode is normal

B1L061 = B1_WP[1] & (B1_WP[0] & B1_WP[2]);


--B1L161 is rs422:inst|LessThan~690 at LC_X3_Y18_N8
--operation mode is normal

B1L161 = B1_WP[1] & (B1_WP[0]);


--D1L621 is clk:inst12|LessThan~1226 at LC_X2_Y22_N8
--operation mode is normal

D1L621 = D1_count0[4] & D1_count0[5] & (D1_count0[3] # !D1L41);


--B1L531 is rs422:inst|flag~306 at LC_X8_Y16_N6
--operation mode is normal

B1L531 = B1L104 & !B1_count1_1[1] & !RXD & B1L004;


--B1L111 is rs422:inst|Dout[7]~177 at LC_X7_Y15_N1
--operation mode is normal

B1L111 = !B1_count1_1[1] & B1_count1_1[0] & (RXD);


--B1L631 is rs422:inst|flag~307 at LC_X14_Y15_N4
--operation mode is normal

B1L631 = F1_q_a[1] # B1L893 & B1L111 & B1L204;


--D1L721 is clk:inst12|LessThan~1227 at LC_X18_Y39_N8
--operation mode is normal

D1L721 = !D1_count2[8] & !D1_count2[9] # !D1_count2[10] # !D1_count2[11];


--D1_count2[0] is clk:inst12|count2[0] at LC_X19_Y39_N1
--operation mode is arithmetic

D1_count2[0]_lut_out = !D1_count2[0];
D1_count2[0] = DFFEAS(D1_count2[0]_lut_out, GLOBAL(CLK40M), VCC, , , , , D1L131, );

--D1L55 is clk:inst12|count2[0]~340 at LC_X19_Y39_N1
--operation mode is arithmetic

D1L55_cout_0 = D1_count2[0];
D1L55 = CARRY(D1L55_cout_0);

--D1L65 is clk:inst12|count2[0]~340COUT1_367 at LC_X19_Y39_N1
--operation mode is arithmetic

D1L65_cout_1 = D1_count2[0];
D1L65 = CARRY(D1L65_cout_1);


--D1L821 is clk:inst12|LessThan~1228 at LC_X18_Y39_N3
--operation mode is normal

D1L821 = !D1_count2[0] # !D1_count2[3] # !D1_count2[5] # !D1_count2[4];


--D1_count2[1] is clk:inst12|count2[1] at LC_X19_Y39_N2
--operation mode is arithmetic

D1_count2[1]_lut_out = D1_count2[1] $ (D1L55);
D1_count2[1] = DFFEAS(D1_count2[1]_lut_out, GLOBAL(CLK40M), VCC, , , , , D1L131, );

--D1L85 is clk:inst12|count2[1]~344 at LC_X19_Y39_N2
--operation mode is arithmetic

D1L85_cout_0 = !D1L55 # !D1_count2[1];
D1L85 = CARRY(D1L85_cout_0);

--D1L95 is clk:inst12|count2[1]~344COUT1_369 at LC_X19_Y39_N2
--operation mode is arithmetic

D1L95_cout_1 = !D1L65 # !D1_count2[1];
D1L95 = CARRY(D1L95_cout_1);


--D1_count2[2] is clk:inst12|count2[2] at LC_X19_Y39_N3
--operation mode is arithmetic

D1_count2[2]_lut_out = D1_count2[2] $ (!D1L85);
D1_count2[2] = DFFEAS(D1_count2[2]_lut_out, GLOBAL(CLK40M), VCC, , , , , D1L131, );

--D1L16 is clk:inst12|count2[2]~348 at LC_X19_Y39_N3
--operation mode is arithmetic

D1L16_cout_0 = D1_count2[2] & (!D1L85);
D1L16 = CARRY(D1L16_cout_0);

--D1L26 is clk:inst12|count2[2]~348COUT1_371 at LC_X19_Y39_N3
--operation mode is arithmetic

D1L26_cout_1 = D1_count2[2] & (!D1L95);
D1L26 = CARRY(D1L26_cout_1);


--D1L921 is clk:inst12|LessThan~1229 at LC_X18_Y39_N2
--operation mode is normal

D1L921 = D1_count2[6] # !D1L821 & D1_count2[2] & D1_count2[1];


--D1L031 is clk:inst12|LessThan~1230 at LC_X18_Y39_N9
--operation mode is normal

D1L031 = !D1L721 & (D1L921 # D1_count2[9] # D1_count2[7]);


--D1L131 is clk:inst12|LessThan~1231 at LC_X18_Y39_N4
--operation mode is normal

D1L131 = D1_count2[16] & D1_count2[17] & (D1L031 # !D1L121);


--B1L011 is rs422:inst|Dout[7]~0 at LC_X7_Y15_N3
--operation mode is normal

B1L011 = B1L304 & B1L111 & B1L893 & B1L204;


--B1_RAM1[8][7] is rs422:inst|RAM1[8][7] at LC_X7_Y23_N5
--operation mode is normal

B1_RAM1[8][7]_lut_out = GND;
B1_RAM1[8][7] = DFFEAS(B1_RAM1[8][7]_lut_out, !GLOBAL(B1_D_enp), VCC, , B1L633, B1_Dout[7], , , VCC);


--B1L261 is rs422:inst|Mux~1067 at LC_X6_Y20_N6
--operation mode is normal

B1_RAM1[9][7]_qfbk = B1_RAM1[9][7];
B1L261 = dsp0_addr[0] & (dsp0_addr[1] # B1_RAM1[9][7]_qfbk) # !dsp0_addr[0] & !dsp0_addr[1] & (B1_RAM1[8][7]);

--B1_RAM1[9][7] is rs422:inst|RAM1[9][7] at LC_X6_Y20_N6
--operation mode is normal

B1_RAM1[9][7] = DFFEAS(B1L261, !GLOBAL(B1_D_enp), VCC, , B1L643, B1_Dout[7], , , VCC);


--B1_RAM1[11][7] is rs422:inst|RAM1[11][7] at LC_X8_Y21_N5
--operation mode is normal

B1_RAM1[11][7]_lut_out = GND;
B1_RAM1[11][7] = DFFEAS(B1_RAM1[11][7]_lut_out, !GLOBAL(B1_D_enp), VCC, , B1L663, B1_Dout[7], , , VCC);


--B1L361 is rs422:inst|Mux~1068 at LC_X6_Y19_N7
--operation mode is normal

B1_RAM1[10][7]_qfbk = B1_RAM1[10][7];
B1L361 = B1L261 & (B1_RAM1[11][7] # !dsp0_addr[1]) # !B1L261 & (B1_RAM1[10][7]_qfbk & dsp0_addr[1]);

--B1_RAM1[10][7] is rs422:inst|RAM1[10][7] at LC_X6_Y19_N7
--operation mode is normal

B1_RAM1[10][7] = DFFEAS(B1L361, !GLOBAL(B1_D_enp), VCC, , B1L653, B1_Dout[7], , , VCC);


--B1_RAM1[4][7] is rs422:inst|RAM1[4][7] at LC_X7_Y22_N0
--operation mode is normal

B1_RAM1[4][7]_lut_out = GND;
B1_RAM1[4][7] = DFFEAS(B1_RAM1[4][7]_lut_out, !GLOBAL(B1_D_enp), VCC, , B1L692, B1_Dout[7], , , VCC);


--B1L461 is rs422:inst|Mux~1069 at LC_X7_Y19_N0
--operation mode is normal

B1_RAM1[6][7]_qfbk = B1_RAM1[6][7];
B1L461 = dsp0_addr[0] & (dsp0_addr[1]) # !dsp0_addr[0] & (dsp0_addr[1] & (B1_RAM1[6][7]_qfbk) # !dsp0_addr[1] & B1_RAM1[4][7]);

--B1_RAM1[6][7] is rs422:inst|RAM1[6][7] at LC_X7_Y19_N0
--operation mode is normal

B1_RAM1[6][7] = DFFEAS(B1L461, !GLOBAL(B1_D_enp), VCC, , B1L613, B1_Dout[7], , , VCC);


--B1_RAM1[7][7] is rs422:inst|RAM1[7][7] at LC_X6_Y22_N3
--operation mode is normal

B1_RAM1[7][7]_lut_out = GND;
B1_RAM1[7][7] = DFFEAS(B1_RAM1[7][7]_lut_out, !GLOBAL(B1_D_enp), VCC, , B1L623, B1_Dout[7], , , VCC);


--B1L561 is rs422:inst|Mux~1070 at LC_X6_Y21_N2
--operation mode is normal

B1_RAM1[5][7]_qfbk = B1_RAM1[5][7];
B1L561 = dsp0_addr[0] & (B1L461 & B1_RAM1[7][7] # !B1L461 & (B1_RAM1[5][7]_qfbk)) # !dsp0_addr[0] & (B1L461);

--B1_RAM1[5][7] is rs422:inst|RAM1[5][7] at LC_X6_Y21_N2
--operation mode is normal

B1_RAM1[5][7] = DFFEAS(B1L561, !GLOBAL(B1_D_enp), VCC, , B1L603, B1_Dout[7], , , VCC);


--B1_RAM1[0][7] is rs422:inst|RAM1[0][7] at LC_X5_Y23_N8
--operation mode is normal

B1_RAM1[0][7]_lut_out = B1_Dout[7];
B1_RAM1[0][7] = DFFEAS(B1_RAM1[0][7]_lut_out, !GLOBAL(B1_D_enp), VCC, , B1L652, , , , );


--B1L661 is rs422:inst|Mux~1071 at LC_X5_Y21_N3
--operation mode is normal

B1_RAM1[1][7]_qfbk = B1_RAM1[1][7];
B1L661 = dsp0_addr[1] & dsp0_addr[0] # !dsp0_addr[1] & (dsp0_addr[0] & B1_RAM1[1][7]_qfbk # !dsp0_addr[0] & (B1_RAM1[0][7]));

--B1_RAM1[1][7] is rs422:inst|RAM1[1][7] at LC_X5_Y21_N3
--operation mode is normal

B1_RAM1[1][7] = DFFEAS(B1L661, !GLOBAL(B1_D_enp), VCC, , B1L662, B1_Dout[7], , , VCC);


--B1L761 is rs422:inst|Mux~1072 at LC_X5_Y20_N5
--operation mode is normal

B1_RAM1[2][7]_qfbk = B1_RAM1[2][7];
B1L761 = B1L661 & (B1_RAM1[3][7] # !dsp0_addr[1]) # !B1L661 & (B1_RAM1[2][7]_qfbk & dsp0_addr[1]);

--B1_RAM1[2][7] is rs422:inst|RAM1[2][7] at LC_X5_Y20_N5
--operation mode is normal

B1_RAM1[2][7] = DFFEAS(B1L761, !GLOBAL(B1_D_enp), VCC, , B1L672, B1_Dout[7], , , VCC);


--B1L861 is rs422:inst|Mux~1073 at LC_X5_Y20_N9
--operation mode is normal

B1L861 = dsp0_addr[3] & (dsp0_addr[2]) # !dsp0_addr[3] & (dsp0_addr[2] & (B1L561) # !dsp0_addr[2] & B1L761);


--B1_RAM1[12][7] is rs422:inst|RAM1[12][7] at LC_X7_Y23_N4
--operation mode is normal

B1_RAM1[12][7]_lut_out = GND;
B1_RAM1[12][7] = DFFEAS(B1_RAM1[12][7]_lut_out, !GLOBAL(B1_D_enp), VCC, , B1L673, B1_Dout[7], , , VCC);


--B1L961 is rs422:inst|Mux~1074 at LC_X8_Y20_N0
--operation mode is normal

B1_RAM1[13][7]_qfbk = B1_RAM1[13][7];
B1L961 = dsp0_addr[0] & B1_RAM1[13][7]_qfbk # !dsp0_addr[0] & (B1_RAM1[12][7]);

--B1_RAM1[13][7] is rs422:inst|RAM1[13][7] at LC_X8_Y20_N0
--operation mode is normal

B1_RAM1[13][7] = DFFEAS(B1L961, !GLOBAL(B1_D_enp), VCC, , B1L683, B1_Dout[7], , , VCC);


--B1L071 is rs422:inst|Mux~1075 at LC_X8_Y20_N5
--operation mode is normal

B1_RAM1[14][7]_qfbk = B1_RAM1[14][7];
B1L071 = dsp0_addr[1] & !dsp0_addr[0] & B1_RAM1[14][7]_qfbk # !dsp0_addr[1] & (B1L961);

--B1_RAM1[14][7] is rs422:inst|RAM1[14][7] at LC_X8_Y20_N5
--operation mode is normal

B1_RAM1[14][7] = DFFEAS(B1L071, !GLOBAL(B1_D_enp), VCC, , B1L693, B1_Dout[7], , , VCC);


--B1_RAM1[1][6] is rs422:inst|RAM1[1][6] at LC_X6_Y21_N0
--operation mode is normal

B1_RAM1[1][6]_lut_out = GND;
B1_RAM1[1][6] = DFFEAS(B1_RAM1[1][6]_lut_out, !GLOBAL(B1_D_enp), VCC, , B1L662, B1_Dout[6], , , VCC);


--B1L171 is rs422:inst|Mux~1078 at LC_X6_Y21_N1
--operation mode is normal

B1