test.sim.rpt

FPGA串口界面调试程序,用VHDL语言实现

+----------------------+
Waveform report data cannot be output to ASCII.
Please use Quartus II to view the waveform report data.


+--------------------------------------------------------------------------------------------------+
; |test|chuankourom:inst4|altsyncram:altsyncram_component|altsyncram_kgs:auto_generated|ALTSYNCRAM ;
+--------------------------------------------------------------------------------------------------+
Memory report data cannot be output to ASCII.
Please use Quartus II to view the memory report data.


+--------------------------------------------------------------------+
; Coverage Summary                                                   ;
+-----------------------------------------------------+--------------+
; Type                                                ; Value        ;
+-----------------------------------------------------+--------------+
; Total coverage as a percentage                      ;      72.33 % ;
; Total nodes checked                                 ; 490          ;
; Total output ports checked                          ; 553          ;
; Total output ports with complete 1/0-value coverage ; 400          ;
; Total output ports with no 1/0-value coverage       ; 136          ;
; Total output ports with no 1-value coverage         ; 136          ;
; Total output ports with no 0-value coverage         ; 153          ;
+-----------------------------------------------------+--------------+


The following table displays output ports that toggle between 1 and 0 during simulation.
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Complete 1/0-Value Coverage                                                                                                                                                                                    ;
+----------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------+------------------+
; Node Name                                                                                    ; Output Port Name                                                                             ; Output Port Type ;
+----------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------+------------------+
; |test|rs422:inst|D_valid1_2                                                                  ; |test|rs422:inst|D_valid1_2                                                                  ; regout           ;
; |test|clk:inst12|clk_480k                                                                    ; |test|clk:inst12|clk_480k                                                                    ; regout           ;
; |test|chuankourom:inst4|altsyncram:altsyncram_component|altsyncram_kgs:auto_generated|q_a[0] ; |test|chuankourom:inst4|altsyncram:altsyncram_component|altsyncram_kgs:auto_generated|q_a[0] ; portadataout0    ;
; |test|clk:inst12|count3[5]                                                                   ; |test|clk:inst12|count3[5]                                                                   ; regout           ;
; |test|clk:inst12|count3[4]                                                                   ; |test|clk:inst12|count3[4]                                                                   ; regout           ;
; |test|clk:inst12|count3[4]                                                                   ; |test|clk:inst12|count3[4]~99                                                                ; cout0            ;
; |test|clk:inst12|count3[3]                                                                   ; |test|clk:inst12|count3[3]                                                                   ; regout           ;
; |test|clk:inst12|count3[3]                                                                   ; |test|clk:inst12|count3[3]~103                                                               ; cout             ;
; |test|clk:inst12|count3[2]                                                                   ; |test|clk:inst12|count3[2]                                                                   ; regout           ;
; |test|clk:inst12|count3[2]                                                                   ; |test|clk:inst12|count3[2]~107                                                               ; cout0            ;
; |test|clk:inst12|count3[2]                                                                   ; |test|clk:inst12|count3[2]~107COUT1_126                                                      ; cout1            ;
; |test|clk:inst12|count3[1]                                                                   ; |test|clk:inst12|count3[1]                                                                   ; regout           ;
; |test|clk:inst12|count3[1]                                                                   ; |test|clk:inst12|count3[1]~111                                                               ; cout0            ;
; |test|clk:inst12|count3[1]                                                                   ; |test|clk:inst12|count3[1]~111COUT1_125                                                      ; cout1            ;
; |test|clk:inst12|count3[0]                                                                   ; |test|clk:inst12|count3[0]                                                                   ; regout           ;
; |test|clk:inst12|count3[0]                                                                   ; |test|clk:inst12|count3[0]~115                                                               ; cout0            ;
; |test|clk:inst12|count3[0]                                                                   ; |test|clk:inst12|count3[0]~115COUT1_123                                                      ; cout1            ;
; |test|rs422:inst|D_en                                                                        ; |test|rs422:inst|D_en                                                                        ; regout           ;
; |test|rs422:inst|D_busy                                                                      ; |test|rs422:inst|D_busy                                                                      ; regout           ;
; |test|clk:inst12|clk_200k                                                                    ; |test|clk:inst12|clk_200k                                                                    ; regout           ;
; |test|rs422:inst|D_valid1_1                                                                  ; |test|rs422:inst|D_valid1_1                                                                  ; regout           ;
; |test|rs422:inst|count1_1[7]                                                                 ; |test|rs422:inst|count1_1[7]                                                                 ; regout           ;
; |test|rs422:inst|count1_1[6]                                                                 ; |test|rs422:inst|count1_1[6]                                                                 ; regout           ;
; |test|rs422:inst|count1_1[5]                                                                 ; |test|rs422:inst|count1_1[5]                                                                 ; regout           ;
; |test|rs422:inst|count1_1[4]                                                                 ; |test|rs422:inst|count1_1[4]                                                                 ; regout           ;
; |test|rs422:inst|count1_1[3]                                                                 ; |test|rs422:inst|count1_1[3]                                                                 ; regout           ;
; |test|rs422:inst|count1_1[2]                                                                 ; |test|rs422:inst|count1_1[2]                                                                 ; regout           ;
; |test|rs422:inst|count1_1[1]                                                                 ; |test|rs422:inst|count1_1[1]                                                                 ; regout           ;
; |test|rs422:inst|count1_1[0]                                                                 ; |test|rs422:inst|count1_1[0]                                                                 ; regout           ;
; |test|rs422:inst|count1_2[2]                                                                 ; |test|rs422:inst|count1_2[2]                                                                 ; regout           ;
; |test|rs422:inst|count1_2[0]                                                                 ; |test|rs422:inst|count1_2[0]                                                                 ; regout           ;
; |test|rs422:inst|Dsum1[2]                                                                    ; |test|rs422:inst|Dsum1[2]                                                                    ; regout           ;
; |test|rs422:inst|Dsum1[1]                                                                    ; |test|rs422:inst|Dsum1[1]                                                                    ; regout           ;
; |test|rs422:inst|Dsum1[0]                                                                    ; |test|rs422:inst|Dsum1[0]                                                                    ; regout           ;
; |test|rs422:inst|LENGTH1_1[2]                                                                ; |test|rs422:inst|LENGTH1_1[2]                                                                ; regout           ;
; |test|rs422:inst|LENGTH1_1[0]                                                                ; |test|rs422:inst|LENGTH1_1[0]                                                                ; regout           ;
; |test|rs422:inst|STATE_1[1]                                                                  ; |test|rs422:inst|STATE_1[1]                                                                  ; regout           ;
; |test|rs422:inst|WP[0]                                                                       ; |test|rs422:inst|WP[0]                                                                       ; regout           ;
; |test|rs422:inst|D_valid1_2~10                                                               ; |test|rs422:inst|D_valid1_2~10                                                               ; combout          ;
; |test|clk:inst12|count0[5]                                                                   ; |test|clk:inst12|count0[5]                                                                   ; regout           ;
; |test|clk:inst12|count0[4]                                                                   ; |test|clk:inst12|count0[4]                                                                   ; regout           ;
; |test|clk:inst12|count0[4]                                                                   ; |test|clk:inst12|count0[4]~131                                                               ; cout0            ;
; |test|clk:inst12|count0[3]                                                                   ; |test|clk:inst12|count0[3]                                                                   ; regout           ;
; |test|clk:inst12|count0[3]                                                                   ; |test|clk:inst12|count0[3]~135                                                               ; cout             ;
; |test|clk:inst12|count0[0]                                                                   ; |test|clk:inst12|count0[0]~139                                                               ; cout0            ;
; |test|clk:inst12|count0[0]                                                                   ; |test|clk:inst12|count0[0]~139COUT1_156                                                      ; cout1            ;