test.fit.qmsg

FPGA串口界面调试程序,用VHDL语言实现

{ "Info" "IFSAC_FSAC_PINS_MISSING_LOCATION_INFO" "58 105 " "Info: No exact pin location assignment(s) for 58 pins of 105 total pins" { { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "CLK_SERIAL " "Info: Pin CLK_SERIAL not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 352 1168 1364 368 "CLK_SERIAL" "" } { 136 256 370 148 "CLK_SERIAL" "" } { -104 448 560 -92 "CLK_SERIAL" "" } { 352 1024 1168 364 "CLK_SERIAL" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "CLK_SERIAL" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { CLK_SERIAL } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { CLK_SERIAL } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "D_enp " "Info: Pin D_enp not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 16 1160 1336 32 "D_enp" "" } { 16 1042 1160 28 "D_enp" "" } { -88 784 871 -76 "D_enp" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "D_enp" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { D_enp } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { D_enp } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "D_busyp " "Info: Pin D_busyp not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 32 1160 1336 48 "D_busyp" "" } { 32 1035 1160 44 "D_busyp" "" } { -72 784 876 -60 "D_busyp" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "D_busyp" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { D_busyp } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { D_busyp } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "irq0test " "Info: Pin irq0test not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 312 1168 1344 328 "irq0test" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "irq0test" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { irq0test } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { irq0test } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "RD " "Info: Pin RD not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 480 1168 1344 496 "RD" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "RD" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { RD } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { RD } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "CLK200K " "Info: Pin CLK200K not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 552 1168 1344 568 "CLK200K" "" } { 168 256 347 180 "CLK200K" "" } { 552 1056 1168 564 "CLK200K" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "CLK200K" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { CLK200K } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { CLK200K } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "D_valid1_1p " "Info: Pin D_valid1_1p not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { -40 1160 1336 -24 "D_valid1_1p" "" } { -40 1032 1160 -28 "D_valid1_1p" "" } { 56 784 893 68 "D_valid1_1p" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "D_valid1_1p" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { D_valid1_1p } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { D_valid1_1p } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "D_error1_1p " "Info: Pin D_error1_1p not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { -56 1160 1336 -40 "D_error1_1p" "" } { 72 784 892 84 "D_error1_1p" "" } { -56 1032 1160 -44 "D_error1_1p" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "D_error1_1p" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { D_error1_1p } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { D_error1_1p } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "count1_1p\[7\] " "Info: Pin count1_1p\[7\] not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 128 1160 1337 144 "count1_1p\[7..0\]" "" } { 24 784 908 36 "count1_1p\[7..0\]" "" } { 128 1006 1160 140 "count1_1p\[7..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "count1_1p\[7\]" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { count1_1p[7] } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { count1_1p[7] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "count1_1p\[6\] " "Info: Pin count1_1p\[6\] not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 128 1160 1337 144 "count1_1p\[7..0\]" "" } { 24 784 908 36 "count1_1p\[7..0\]" "" } { 128 1006 1160 140 "count1_1p\[7..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "count1_1p\[6\]" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { count1_1p[6] } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { count1_1p[6] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "count1_1p\[5\] " "Info: Pin count1_1p\[5\] not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 128 1160 1337 144 "count1_1p\[7..0\]" "" } { 24 784 908 36 "count1_1p\[7..0\]" "" } { 128 1006 1160 140 "count1_1p\[7..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "count1_1p\[5\]" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { count1_1p[5] } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { count1_1p[5] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "count1_1p\[4\] " "Info: Pin count1_1p\[4\] not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 128 1160 1337 144 "count1_1p\[7..0\]" "" } { 24 784 908 36 "count1_1p\[7..0\]" "" } { 128 1006 1160 140 "count1_1p\[7..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "count1_1p\[4\]" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { count1_1p[4] } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { count1_1p[4] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "count1_1p\[3\] " "Info: Pin count1_1p\[3\] not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 128 1160 1337 144 "count1_1p\[7..0\]" "" } { 24 784 908 36 "count1_1p\[7..0\]" "" } { 128 1006 1160 140 "count1_1p\[7..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "count1_1p\[3\]" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { count1_1p[3] } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { count1_1p[3] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "count1_1p\[2\] " "Info: Pin count1_1p\[2\] not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 128 1160 1337 144 "count1_1p\[7..0\]" "" } { 24 784 908 36 "count1_1p\[7..0\]" "" } { 128 1006 1160 140 "count1_1p\[7..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "count1_1p\[2\]" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { count1_1p[2] } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { count1_1p[2] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "count1_1p\[1\] " "Info: Pin count1_1p\[1\] not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 128 1160 1337 144 "count1_1p\[7..0\]" "" } { 24 784 908 36 "count1_1p\[7..0\]" "" } { 128 1006 1160 140 "count1_1p\[7..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "count1_1p\[1\]" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { count1_1p[1] } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { count1_1p[1] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "count1_1p\[0\] " "Info: Pin count1_1p\[0\] not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 128 1160 1337 144 "count1_1p\[7..0\]" "" } { 24 784 908 36 "count1_1p\[7..0\]" "" } { 128 1006 1160 140 "count1_1p\[7..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "count1_1p\[0\]" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { count1_1p[0] } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { count1_1p[0] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "count1_2p\[3\] " "Info: Pin count1_2p\[3\] not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 144 1160 1349 160 "count1_2p\[3..0\]" "" } { 40 784 907 52 "count1_2p\[3..0\]" "" } { 144 1008 1160 156 "count1_2p\[3..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "count1_2p\[3\]" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { count1_2p[3] } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { count1_2p[3] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "count1_2p\[2\] " "Info: Pin count1_2p\[2\] not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 144 1160 1349 160 "count1_2p\[3..0\]" "" } { 40 784 907 52 "count1_2p\[3..0\]" "" } { 144 1008 1160 156 "count1_2p\[3..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "count1_2p\[2\]" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { count1_2p[2] } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { count1_2p[2] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "count1_2p\[1\] " "Info: Pin count1_2p\[1\] not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 144 1160 1349 160 "count1_2p\[3..0\]" "" } { 40 784 907 52 "count1_2p\[3..0\]" "" } { 144 1008 1160 156 "count1_2p\[3..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "count1_2p\[1\]" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { count1_2p[1] } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { count1_2p[1] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "count1_2p\[0\] " "Info: Pin count1_2p\[0\] not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 144 1160 1349 160 "count1_2p\[3..0\]" "" } { 40 784 907 52 "count1_2p\[3..0\]" "" } { 144 1008 1160 156 "count1_2p\[3..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "count1_2p\[0\]" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { count1_2p[0] } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { count1_2p[0] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "Doutp\[7\] " "Info: Pin Doutp\[7\] not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 0 1160 1336 16 "Doutp\[7..0\]" "" } { 0 1031 1160 12 "Doutp\[7..0\]" "" } { -104 784 895 -92 "Doutp\[7..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "Doutp\[7\]" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { Doutp[7] } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { Doutp[7] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "Doutp\[6\] " "Info: Pin Doutp\[6\] not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 0 1160 1336 16 "Doutp\[7..0\]" "" } { 0 1031 1160 12 "Doutp\[7..0\]" "" } { -104 784 895 -92 "Doutp\[7..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "Doutp\[6\]" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { Doutp[6] } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { Doutp[6] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "Doutp\[5\] " "Info: Pin Doutp\[5\] not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 0 1160 1336 16 "Doutp\[7..0\]" "" } { 0 1031 1160 12 "Doutp\[7..0\]" "" } { -104 784 895 -92 "Doutp\[7..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "Doutp\[5\]" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { Doutp[5] } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { Doutp[5] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "Doutp\[4\] " "Info: Pin Doutp\[4\] not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 0 1160 1336 16 "Doutp\[7..0\]" "" } { 0 1031 1160 12 "Doutp\[7..0\]" "" } { -104 784 895 -92 "Doutp\[7..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "Doutp\[4\]" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { Doutp[4] } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { Doutp[4] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "Doutp\[3\] " "Info: Pin Doutp\[3\] not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 0 1160 1336 16 "Doutp\[7..0\]" "" } { 0 1031 1160 12 "Doutp\[7..0\]" "" } { -104 784 895 -92 "Doutp\[7..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "Doutp\[3\]" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { Doutp[3] } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { Doutp[3] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "Doutp\[2\] " "Info: Pin Doutp\[2\] not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 0 1160 1336 16 "Doutp\[7..0\]" "" } { 0 1031 1160 12 "Doutp\[7..0\]" "" } { -104 784 895 -92 "Doutp\[7..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "Doutp\[2\]" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { Doutp[2] } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { Doutp[2] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "Doutp\[1\] " "Info: Pin Doutp\[1\] not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 0 1160 1336 16 "Doutp\[7..0\]" "" } { 0 1031 1160 12 "Doutp\[7..0\]" "" } { -104 784 895 -92 "Doutp\[7..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "Doutp\[1\]" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { Doutp[1] } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { Doutp[1] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "Doutp\[0\] " "Info: Pin Doutp\[0\] not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 0 1160 1336 16 "Doutp\[7..0\]" "" } { 0 1031 1160 12 "Doutp\[7..0\]" "" } { -104 784 895 -92 "Doutp\[7..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "Doutp\[0\]" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { Doutp[0] } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { Doutp[0] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "Dsum1p\[7\] " "Info: Pin Dsum1p\[7\] not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 64 1160 1336 80 "Dsum1p\[7..0\]" "" } { 64 1011 1160 76 "Dsum1p\[7..0\]" "" } { -24 784 899 -12 "Dsum1p\[7..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "Dsum1p\[7\]" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { Dsum1p[7] } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { Dsum1p[7] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "Dsum1p\[6\] " "Info: Pin Dsum1p\[6\] not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 64 1160 1336 80 "Dsum1p\[7..0\]" "" } { 64 1011 1160 76 "Dsum1p\[7..0\]" "" } { -24 784 899 -12 "Dsum1p\[7..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "Dsum1p\[6\]" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { Dsum1p[6] } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { Dsum1p[6] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "Dsum1p\[5\] " "Info: Pin Dsum1p\[5\] not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 64 1160 1336 80 "Dsum1p\[7..0\]" "" } { 64 1011 1160 76 "Dsum1p\[7..0\]" "" } { -24 784 899 -12 "Dsum1p\[7..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "Dsum1p\[5\]" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { Dsum1p[5] } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { Dsum1p[5] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "Dsum1p\[4\] " "Info: Pin Dsum1p\[4\] not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 64 1160 1336 80 "Dsum1p\[7..0\]" "" } { 64 1011 1160 76 "Dsum1p\[7..0\]" "" } { -24 784 899 -12 "Dsum1p\[7..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "Dsum1p\[4\]" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { Dsum1p[4] } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { Dsum1p[4] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "Dsum1p\[3\] " "Info: Pin Dsum1p\[3\] not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 64 1160 1336 80 "Dsum1p\[7..0\]" "" } { 64 1011 1160 76 "Dsum1p\[7..0\]" "" } { -24 784 899 -12 "Dsum1p\[7..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "Dsum1p\[3\]" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { Dsum1p[3] } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { Dsum1p[3] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "Dsum1p\[2\] " "Info: Pin Dsum1p\[2\] not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 64 1160 1336 80 "Dsum1p\[7..0\]" "" } { 64 1011 1160 76 "Dsum1p\[7..0\]" "" } { -24 784 899 -12 "Dsum1p\[7..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "Dsum1p\[2\]" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { Dsum1p[2] } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { Dsum1p[2] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "Dsum1p\[1\] " "Info: Pin Dsum1p\[1\] not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 64 1160 1336 80 "Dsum1p\[7..0\]" "" } { 64 1011 1160 76 "Dsum1p\[7..0\]" "" } { -24 784 899 -12 "Dsum1p\[7..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "Dsum1p\[1\]" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { Dsum1p[1] } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { Dsum1p[1] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "Dsum1p\[0\] " "Info: Pin Dsum1p\[0\] not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 64 1160 1336 80 "Dsum1p\[7..0\]" "" } { 64 1011 1160 76 "Dsum1p\[7..0\]" "" } { -24 784 899 -12 "Dsum1p\[7..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "Dsum1p\[0\]" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { Dsum1p[0] } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { Dsum1p[0] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "LENGTH1_1p\[3\] " "Info: Pin LENGTH1_1p\[3\] not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 80 1160 1348 96 "LENGTH1_1p\[3..0\]" "" } { -8 784 925 4 "LENGTH1_1p\[3..0\]" "" } { 80 998 1160 92 "LENGTH1_1p\[3..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "LENGTH1_1p\[3\]" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { LENGTH1_1p[3] } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { LENGTH1_1p[3] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "LENGTH1_1p\[2\] " "Info: Pin LENGTH1_1p\[2\] not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 80 1160 1348 96 "LENGTH1_1p\[3..0\]" "" } { -8 784 925 4 "LENGTH1_1p\[3..0\]" "" } { 80 998 1160 92 "LENGTH1_1p\[3..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "LENGTH1_1p\[2\]" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { LENGTH1_1p[2] } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { LENGTH1_1p[2] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "LENGTH1_1p\[1\] " "Info: Pin LENGTH1_1p\[1\] not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 80 1160 1348 96 "LENGTH1_1p\[3..0\]" "" } { -8 784 925 4 "LENGTH1_1p\[3..0\]" "" } { 80 998 1160 92 "LENGTH1_1p\[3..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "LENGTH1_1p\[1\]" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { LENGTH1_1p[1] } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { LENGTH1_1p[1] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "LENGTH1_1p\[0\] " "Info: Pin LENGTH1_1p\[0\] not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 80 1160 1348 96 "LENGTH1_1p\[3..0\]" "" } { -8 784 925 4 "LENGTH1_1p\[3..0\]" "" } { 80 998 1160 92 "LENGTH1_1p\[3..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "LENGTH1_1p\[0\]" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { LENGTH1_1p[0] } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { LENGTH1_1p[0] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "LENGTH1_2p\[3\] " "Info: Pin LENGTH1_2p\[3\] not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 96 1160 1349 112 "LENGTH1_2p\[3..0\]" "" } { 8 784 925 20 "LENGTH1_2p\[3..0\]" "" } { 96 1000 1160 108 "LENGTH1_2p\[3..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "LENGTH1_2p\[3\]" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { LENGTH1_2p[3] } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { LENGTH1_2p[3] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "LENGTH1_2p\[2\] " "Info: Pin LENGTH1_2p\[2\] not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 96 1160 1349 112 "LENGTH1_2p\[3..0\]" "" } { 8 784 925 20 "LENGTH1_2p\[3..0\]" "" } { 96 1000 1160 108 "LENGTH1_2p\[3..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "LENGTH1_2p\[2\]" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { LENGTH1_2p[2] } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { LENGTH1_2p[2] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "LENGTH1_2p\[1\] " "Info: Pin LENGTH1_2p\[1\] not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 96 1160 1349 112 "LENGTH1_2p\[3..0\]" "" } { 8 784 925 20 "LENGTH1_2p\[3..0\]" "" } { 96 1000 1160 108 "LENGTH1_2p\[3..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "LENGTH1_2p\[1\]" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { LENGTH1_2p[1] } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { LENGTH1_2p[1] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "LENGTH1_2p\[0\] " "Info: Pin LENGTH1_2p\[0\] not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 96 1160 1349 112 "LENGTH1_2p\[3..0\]" "" } { 8 784 925 20 "LENGTH1_2p\[3..0\]" "" } { 96 1000 1160 108 "LENGTH1_2p\[3..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "LENGTH1_2p\[0\]" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { LENGTH1_2p[0] } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { LENGTH1_2p[0] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "ROMADDR\[5\] " "Info: Pin ROMADDR\[5\] not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 400 1168 1364 416 "ROMADDR\[5..0\]" "" } { 184 256 386 196 "ROMADDR\[5..0\]" "" } { 400 1008 1168 412 "ROMADDR\[5..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "ROMADDR\[5\]" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { ROMADDR[5] } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { ROMADDR[5] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "ROMADDR\[4\] " "Info: Pin ROMADDR\[4\] not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 400 1168 1364 416 "ROMADDR\[5..0\]" "" } { 184 256 386 196 "ROMADDR\[5..0\]" "" } { 400 1008 1168 412 "ROMADDR\[5..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "ROMADDR\[4\]" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { ROMADDR[4] } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { ROMADDR[4] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "ROMADDR\[3\] " "Info: Pin ROMADDR\[3\] not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 400 1168 1364 416 "ROMADDR\[5..0\]" "" } { 184 256 386 196 "ROMADDR\[5..0\]" "" } { 400 1008 1168 412 "ROMADDR\[5..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "ROMADDR\[3\]" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { ROMADDR[3] } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { ROMADDR[3] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "ROMADDR\[2\] " "Info: Pin ROMADDR\[2\] not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 400 1168 1364 416 "ROMADDR\[5..0\]" "" } { 184 256 386 196 "ROMADDR\[5..0\]" "" } { 400 1008 1168 412 "ROMADDR\[5..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "ROMADDR\[2\]" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { ROMADDR[2] } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { ROMADDR[2] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "ROMADDR\[1\] " "Info: Pin ROMADDR\[1\] not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 400 1168 1364 416 "ROMADDR\[5..0\]" "" } { 184 256 386 196 "ROMADDR\[5..0\]" "" } { 400 1008 1168 412 "ROMADDR\[5..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "ROMADDR\[1\]" } } } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" "" { Report "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test_cmp.qrpt" Compiler "test" "UNKNOWN" "V1" "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/db/test.quartus_db" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/" "" "" { ROMADDR[1] } "NODE_NAME" } "" } } { "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" { Floorplan "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.fld" "" "" { ROMADDR[1] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "ROMADDR\[0\] " "Info: Pin ROMADDR\[0\] not assigned to an exact location on the device" {  } { { "test.bdf" "" { Schematic "C:/Documents and Settings/uesr/桌面/ML9串口调试/FPGA串口界面调试程序/test.bdf" { { 400 1168 1364 416 "ROMADDR\[5..0\]" "" } { 184 256 386 196 "ROMADDR\[5..0\]" "" } { 400 1008 1168 412 "ROMADDR\[5..0\]" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "ROMADDR\[0\]" } } } } { "