myfx2.tan.summary

FPGA与USB通信的测试代码

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : -1.970 ns
From           : nRESET
To             : LDT
From Clock     : 
To Clock       : MMCLK
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 10.080 ns
From           : LDT
To             : LED[3]
From Clock     : MMCLK
To Clock       : 
Failed Paths   : 0

Type           : Worst-case tpd
Slack          : N/A
Required Time  : None
Actual Time    : 13.088 ns
From           : PA[0]
To             : LED[0]
From Clock     : 
To Clock       : 
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : 2.022 ns
From           : nRESET
To             : LDT
From Clock     : 
To Clock       : MMCLK
Failed Paths   : 0

Type           : Clock Setup: 'MMCLK'
Slack          : N/A
Required Time  : None
Actual Time    : Restricted to 275.03 MHz ( period = 3.636 ns )
From           : Mega_cnt[3]
To             : Mega_cnt[23]
From Clock     : MMCLK
To Clock       : MMCLK
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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