myfx2.map.eqn

FPGA与USB通信的测试代码

-- Copyright (C) 1991-2005 Altera Corporation
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-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
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-- applicable agreement for further details.
--A1L591 is Select~688
--operation mode is normal

A1L591 = CTL[4] & (CTL[5] & A1L351 # !CTL[5] & (A1L93)) # !CTL[4] & A1L351;


--A1L62 is DREG~72
--operation mode is normal

A1L62 = CTL[5] $ CTL[4];


--DREG[0] is DREG[0]
--operation mode is normal

DREG[0] = A1L62 & A1L591 # !A1L62 & (DREG[0]);


--A1L691 is Select~689
--operation mode is normal

A1L691 = CTL[4] & (CTL[5] & A1L551 # !CTL[5] & (A1L14)) # !CTL[4] & A1L551;


--DREG[1] is DREG[1]
--operation mode is normal

DREG[1] = A1L62 & A1L691 # !A1L62 & (DREG[1]);


--A1L791 is Select~690
--operation mode is normal

A1L791 = CTL[4] & (CTL[5] & A1L751 # !CTL[5] & (A1L34)) # !CTL[4] & A1L751;


--DREG[2] is DREG[2]
--operation mode is normal

DREG[2] = A1L62 & A1L791 # !A1L62 & (DREG[2]);


--A1L891 is Select~691
--operation mode is normal

A1L891 = CTL[4] & (CTL[5] & A1L951 # !CTL[5] & (A1L54)) # !CTL[4] & A1L951;


--DREG[3] is DREG[3]
--operation mode is normal

DREG[3] = A1L62 & A1L891 # !A1L62 & (DREG[3]);


--A1L991 is Select~692
--operation mode is normal

A1L991 = CTL[4] & (CTL[5] & A1L161 # !CTL[5] & (A1L74)) # !CTL[4] & A1L161;


--DREG[4] is DREG[4]
--operation mode is normal

DREG[4] = A1L62 & A1L991 # !A1L62 & (DREG[4]);


--A1L002 is Select~693
--operation mode is normal

A1L002 = CTL[4] & (CTL[5] & A1L361 # !CTL[5] & (A1L94)) # !CTL[4] & A1L361;


--DREG[5] is DREG[5]
--operation mode is normal

DREG[5] = A1L62 & A1L002 # !A1L62 & (DREG[5]);


--A1L102 is Select~694
--operation mode is normal

A1L102 = CTL[4] & (CTL[5] & A1L561 # !CTL[5] & (A1L15)) # !CTL[4] & A1L561;


--DREG[6] is DREG[6]
--operation mode is normal

DREG[6] = A1L62 & A1L102 # !A1L62 & (DREG[6]);


--A1L202 is Select~695
--operation mode is normal

A1L202 = CTL[4] & (CTL[5] & A1L761 # !CTL[5] & (A1L35)) # !CTL[4] & A1L761;


--DREG[7] is DREG[7]
--operation mode is normal

DREG[7] = A1L62 & A1L202 # !A1L62 & (DREG[7]);


--A1L302 is Select~696
--operation mode is normal

A1L302 = CTL[4] & (CTL[5] & A1L961 # !CTL[5] & (A1L55)) # !CTL[4] & A1L961;


--DREG[8] is DREG[8]
--operation mode is normal

DREG[8] = A1L62 & A1L302 # !A1L62 & (DREG[8]);


--A1L402 is Select~697
--operation mode is normal

A1L402 = CTL[4] & (CTL[5] & A1L171 # !CTL[5] & (A1L75)) # !CTL[4] & A1L171;


--DREG[9] is DREG[9]
--operation mode is normal

DREG[9] = A1L62 & A1L402 # !A1L62 & (DREG[9]);


--A1L502 is Select~698
--operation mode is normal

A1L502 = CTL[4] & (CTL[5] & A1L371 # !CTL[5] & (A1L95)) # !CTL[4] & A1L371;


--DREG[10] is DREG[10]
--operation mode is normal

DREG[10] = A1L62 & A1L502 # !A1L62 & (DREG[10]);


--A1L602 is Select~699
--operation mode is normal

A1L602 = CTL[4] & (CTL[5] & A1L571 # !CTL[5] & (A1L16)) # !CTL[4] & A1L571;


--DREG[11] is DREG[11]
--operation mode is normal

DREG[11] = A1L62 & A1L602 # !A1L62 & (DREG[11]);


--A1L702 is Select~700
--operation mode is normal

A1L702 = CTL[4] & (CTL[5] & A1L771 # !CTL[5] & (A1L36)) # !CTL[4] & A1L771;


--DREG[12] is DREG[12]
--operation mode is normal

DREG[12] = A1L62 & A1L702 # !A1L62 & (DREG[12]);


--A1L802 is Select~701
--operation mode is normal

A1L802 = CTL[4] & (CTL[5] & A1L971 # !CTL[5] & (A1L56)) # !CTL[4] & A1L971;


--DREG[13] is DREG[13]
--operation mode is normal

DREG[13] = A1L62 & A1L802 # !A1L62 & (DREG[13]);


--A1L902 is Select~702
--operation mode is normal

A1L902 = CTL[4] & (CTL[5] & A1L181 # !CTL[5] & (A1L76)) # !CTL[4] & A1L181;


--DREG[14] is DREG[14]
--operation mode is normal

DREG[14] = A1L62 & A1L902 # !A1L62 & (DREG[14]);


--A1L012 is Select~703
--operation mode is normal

A1L012 = CTL[4] & (CTL[5] & A1L381 # !CTL[5] & (A1L96)) # !CTL[4] & A1L381;


--DREG[15] is DREG[15]
--operation mode is normal

DREG[15] = A1L62 & A1L012 # !A1L62 & (DREG[15]);


--nRESET is nRESET
--operation mode is input

nRESET = INPUT();


--PA[6] is PA[6]
--operation mode is input

PA[6] = INPUT();


--PA[7] is PA[7]
--operation mode is input

PA[7] = INPUT();


--CTL[0] is CTL[0]
--operation mode is input

CTL[0] = INPUT();


--CTL[1] is CTL[1]
--operation mode is input

CTL[1] = INPUT();


--CTL[2] is CTL[2]
--operation mode is input

CTL[2] = INPUT();


--RDY[0] is RDY[0]
--operation mode is input

RDY[0] = INPUT();


--RDY[1] is RDY[1]
--operation mode is input

RDY[1] = INPUT();


--RDY[2] is RDY[2]
--operation mode is input

RDY[2] = INPUT();


--RDY[3] is RDY[3]
--operation mode is input

RDY[3] = INPUT();


--RDY[4] is RDY[4]
--operation mode is input

RDY[4] = INPUT();


--RDY[5] is RDY[5]
--operation mode is input

RDY[5] = INPUT();


--USER[0] is USER[0]
--operation mode is input

USER[0] = INPUT();


--USER[1] is USER[1]
--operation mode is input

USER[1] = INPUT();


--USER[2] is USER[2]
--operation mode is input

USER[2] = INPUT();


--USER[3] is USER[3]
--operation mode is input

USER[3] = INPUT();


--USER[4] is USER[4]
--operation mode is input

USER[4] = INPUT();


--USER[5] is USER[5]
--operation mode is input

USER[5] = INPUT();


--IFCLK is IFCLK
--operation mode is input

IFCLK = INPUT();


--CLKOUT is CLKOUT
--operation mode is input

CLKOUT = INPUT();


--nINT5 is nINT5
--operation mode is input

nINT5 = INPUT();


--KEY[0] is KEY[0]
--operation mode is input

KEY[0] = INPUT();


--KEY[1] is KEY[1]
--operation mode is input

KEY[1] = INPUT();


--KEY[2] is KEY[2]
--operation mode is input

KEY[2] = INPUT();


--MMCLK is MMCLK
--operation mode is input

MMCLK = INPUT();


--GPA[0] is GPA[0]
--operation mode is input

GPA[0] = INPUT();


--GPA[1] is GPA[1]
--operation mode is input

GPA[1] = INPUT();


--GPA[2] is GPA[2]
--operation mode is input

GPA[2] = INPUT();


--GPA[3] is GPA[3]
--operation mode is input

GPA[3] = INPUT();


--GPA[4] is GPA[4]
--operation mode is input

GPA[4] = INPUT();


--GPA[5] is GPA[5]
--operation mode is input

GPA[5] = INPUT();


--GPA[6] is GPA[6]
--operation mode is input

GPA[6] = INPUT();


--GPA[7] is GPA[7]
--operation mode is input

GPA[7] = INPUT();


--GPA[8] is GPA[8]
--operation mode is input

GPA[8] = INPUT();


--PA[0] is PA[0]
--operation mode is input

PA[0] = INPUT();


--PA[1] is PA[1]
--operation mode is input

PA[1] = INPUT();


--PA[2] is PA[2]
--operation mode is input

PA[2] = INPUT();


--PA[3] is PA[3]
--operation mode is input

PA[3] = INPUT();


--PA[4] is PA[4]
--operation mode is input

PA[4] = INPUT();


--PA[5] is PA[5]
--operation mode is input

PA[5] = INPUT();


--CTL[5] is CTL[5]
--operation mode is input

CTL[5] = INPUT();


--CTL[3] is CTL[3]
--operation mode is input

CTL[3] = INPUT();


--CTL[4] is CTL[4]
--operation mode is input

CTL[4] = INPUT();


--USBCLK is USBCLK
--operation mode is output

USBCLK = OUTPUT(MMCLK);


--LED[0] is LED[0]
--operation mode is output

LED[0] = OUTPUT(GND);


--LED[1] is LED[1]
--operation mode is output

LED[1] = OUTPUT(GND);


--LED[2] is LED[2]
--operation mode is output

LED[2] = OUTPUT(GND);


--LED[3] is LED[3]
--operation mode is output

LED[3] = OUTPUT(GND);


--RAMAA[0] is RAMAA[0]
--operation mode is output

RAMAA[0] = OUTPUT(GND);


--RAMAA[1] is RAMAA[1]
--operation mode is output

RAMAA[1] = OUTPUT(GND);


--RAMAA[2] is RAMAA[2]
--operation mode is output

RAMAA[2] = OUTPUT(GND);


--RAMAA[3] is RAMAA[3]
--operation mode is output

RAMAA[3] = OUTPUT(GND);


--RAMAA[4] is RAMAA[4]
--operation mode is output

RAMAA[4] = OUTPUT(GND);


--RAMAA[5] is RAMAA[5]
--operation mode is output

RAMAA[5] = OUTPUT(GND);


--RAMAA[6] is RAMAA[6]
--operation mode is output

RAMAA[6] = OUTPUT(GND);


--RAMAA[7] is RAMAA[7]
--operation mode is output

RAMAA[7] = OUTPUT(GND);


--RAMAA[8] is RAMAA[8]
--operation mode is output

RAMAA[8] = OUTPUT(GND);


--RAMAA[9] is RAMAA[9]
--operation mode is output

RAMAA[9] = OUTPUT(GND);


--RAMAA[10] is RAMAA[10]
--operation mode is output

RAMAA[10] = OUTPUT(GND);


--RAMAA[11] is RAMAA[11]
--operation mode is output

RAMAA[11] = OUTPUT(GND);


--RAMAA[12] is RAMAA[12]
--operation mode is output

RAMAA[12] = OUTPUT(GND);


--RAMAA[13] is RAMAA[13]
--operation mode is output

RAMAA[13] = OUTPUT(GND);


--RAMAA[14] is RAMAA[14]
--operation mode is output

RAMAA[14] = OUTPUT(GND);


--RAMAA[15] is RAMAA[15]
--operation mode is output

RAMAA[15] = OUTPUT(GND);


--RAMAA[16] is RAMAA[16]
--operation mode is output

RAMAA[16] = OUTPUT(GND);


--RAMAA[17] is RAMAA[17]
--operation mode is output

RAMAA[17] = OUTPUT(GND);


--RAMAUB is RAMAUB
--operation mode is output

RAMAUB = OUTPUT(GND);


--RAMALB is RAMALB
--operation mode is output

RAMALB = OUTPUT(GND);


--RAMAWE is RAMAWE
--operation mode is output

RAMAWE = OUTPUT(GND);


--RAMACE is RAMACE
--operation mode is output