myfx2.tan.summary

来自「FPGA与USB通信的测试代码」· SUMMARY 代码 · 共 47 行

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Timing Analyzer Summary
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Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 13.214 ns
From           : DREG[4]
To             : GPD[4]
From Clock     : MMCLK
To Clock       : 
Failed Paths   : 0

Type           : Worst-case tpd
Slack          : N/A
Required Time  : None
Actual Time    : 5.957 ns
From           : MMCLK
To             : USBCLK
From Clock     : 
To Clock       : 
Failed Paths   : 0

Type           : Clock Setup: 'MMCLK'
Slack          : N/A
Required Time  : None
Actual Time    : Restricted to 275.03 MHz ( period = 3.636 ns )
From           : DREG[0]
To             : DREG[13]
From Clock     : MMCLK
To Clock       : MMCLK
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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