myfx2.fit.qmsg

FPGA与USB通信的测试代码

{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Info: Fitter placement was successful" {  } {  } 0}
{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "2.577 ns register register " "Info: Estimated most critical path is register to register delay of 2.577 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns DREG\[3\] 1 REG LAB_X2_Y15 4 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X2_Y15; Fanout = 4; REG Node = 'DREG\[3\]'" {  } { { "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/db/MYFX2_cmp.qrpt" "" { Report "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/db/MYFX2_cmp.qrpt" Compiler "MYFX2" "UNKNOWN" "V1" "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/db/MYFX2.quartus_db" { Floorplan "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/" "" "" { DREG[3] } "NODE_NAME" } "" } } { "MYFX2.v" "" { Text "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/MYFX2.v" 41 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.470 ns) + CELL(0.575 ns) 1.045 ns DREG\[3\]~141COUT1_195 2 COMB LAB_X2_Y15 2 " "Info: 2: + IC(0.470 ns) + CELL(0.575 ns) = 1.045 ns; Loc. = LAB_X2_Y15; Fanout = 2; COMB Node = 'DREG\[3\]~141COUT1_195'" {  } { { "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/db/MYFX2_cmp.qrpt" "" { Report "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/db/MYFX2_cmp.qrpt" Compiler "MYFX2" "UNKNOWN" "V1" "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/db/MYFX2.quartus_db" { Floorplan "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/" "" "1.045 ns" { DREG[3] DREG[3]~141COUT1_195 } "NODE_NAME" } "" } } { "MYFX2.v" "" { Text "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/MYFX2.v" 41 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 1.125 ns DREG\[4\]~145COUT1_196 3 COMB LAB_X2_Y15 2 " "Info: 3: + IC(0.000 ns) + CELL(0.080 ns) = 1.125 ns; Loc. = LAB_X2_Y15; Fanout = 2; COMB Node = 'DREG\[4\]~145COUT1_196'" {  } { { "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/db/MYFX2_cmp.qrpt" "" { Report "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/db/MYFX2_cmp.qrpt" Compiler "MYFX2" "UNKNOWN" "V1" "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/db/MYFX2.quartus_db" { Floorplan "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/" "" "0.080 ns" { DREG[3]~141COUT1_195 DREG[4]~145COUT1_196 } "NODE_NAME" } "" } } { "MYFX2.v" "" { Text "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/MYFX2.v" 41 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 1.205 ns DREG\[5\]~149COUT1_197 4 COMB LAB_X2_Y15 2 " "Info: 4: + IC(0.000 ns) + CELL(0.080 ns) = 1.205 ns; Loc. = LAB_X2_Y15; Fanout = 2; COMB Node = 'DREG\[5\]~149COUT1_197'" {  } { { "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/db/MYFX2_cmp.qrpt" "" { Report "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/db/MYFX2_cmp.qrpt" Compiler "MYFX2" "UNKNOWN" "V1" "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/db/MYFX2.quartus_db" { Floorplan "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/" "" "0.080 ns" { DREG[4]~145COUT1_196 DREG[5]~149COUT1_197 } "NODE_NAME" } "" } } { "MYFX2.v" "" { Text "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/MYFX2.v" 41 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 1.285 ns DREG\[6\]~153COUT1_198 5 COMB LAB_X2_Y15 2 " "Info: 5: + IC(0.000 ns) + CELL(0.080 ns) = 1.285 ns; Loc. = LAB_X2_Y15; Fanout = 2; COMB Node = 'DREG\[6\]~153COUT1_198'" {  } { { "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/db/MYFX2_cmp.qrpt" "" { Report "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/db/MYFX2_cmp.qrpt" Compiler "MYFX2" "UNKNOWN" "V1" "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/db/MYFX2.quartus_db" { Floorplan "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/" "" "0.080 ns" { DREG[5]~149COUT1_197 DREG[6]~153COUT1_198 } "NODE_NAME" } "" } } { "MYFX2.v" "" { Text "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/MYFX2.v" 41 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.258 ns) 1.543 ns DREG\[7\]~157 6 COMB LAB_X2_Y15 6 " "Info: 6: + IC(0.000 ns) + CELL(0.258 ns) = 1.543 ns; Loc. = LAB_X2_Y15; Fanout = 6; COMB Node = 'DREG\[7\]~157'" {  } { { "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/db/MYFX2_cmp.qrpt" "" { Report "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/db/MYFX2_cmp.qrpt" Compiler "MYFX2" "UNKNOWN" "V1" "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/db/MYFX2.quartus_db" { Floorplan "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/" "" "0.258 ns" { DREG[6]~153COUT1_198 DREG[7]~157 } "NODE_NAME" } "" } } { "MYFX2.v" "" { Text "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/MYFX2.v" 41 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.136 ns) 1.679 ns DREG\[12\]~177 7 COMB LAB_X2_Y14 3 " "Info: 7: + IC(0.000 ns) + CELL(0.136 ns) = 1.679 ns; Loc. = LAB_X2_Y14; Fanout = 3; COMB Node = 'DREG\[12\]~177'" {  } { { "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/db/MYFX2_cmp.qrpt" "" { Report "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/db/MYFX2_cmp.qrpt" Compiler "MYFX2" "UNKNOWN" "V1" "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/db/MYFX2.quartus_db" { Floorplan "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/" "" "0.136 ns" { DREG[7]~157 DREG[12]~177 } "NODE_NAME" } "" } } { "MYFX2.v" "" { Text "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/MYFX2.v" 41 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.898 ns) 2.577 ns DREG\[13\] 8 REG LAB_X2_Y14 4 " "Info: 8: + IC(0.000 ns) + CELL(0.898 ns) = 2.577 ns; Loc. = LAB_X2_Y14; Fanout = 4; REG Node = 'DREG\[13\]'" {  } { { "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/db/MYFX2_cmp.qrpt" "" { Report "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/db/MYFX2_cmp.qrpt" Compiler "MYFX2" "UNKNOWN" "V1" "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/db/MYFX2.quartus_db" { Floorplan "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/" "" "0.898 ns" { DREG[12]~177 DREG[13] } "NODE_NAME" } "" } } { "MYFX2.v" "" { Text "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/MYFX2.v" 41 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.107 ns 81.76 % " "Info: Total cell delay = 2.107 ns ( 81.76 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.470 ns 18.24 % " "Info: Total interconnect delay = 0.470 ns ( 18.24 % )" {  } {  } 0}  } { { "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/db/MYFX2_cmp.qrpt" "" { Report "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/db/MYFX2_cmp.qrpt" Compiler "MYFX2" "UNKNOWN" "V1" "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/db/MYFX2.quartus_db" { Floorplan "C:/Documents and Settings/曹雄恒/桌面/MYFPGAT2/" "" "2.577 ns" { DREG[3] DREG[3]~141COUT1_195 DREG[4]~145COUT1_196 DREG[5]~149COUT1_197 DREG[6]~153COUT1_198 DREG[7]~157 DREG[12]~177 DREG[13] } "NODE_NAME" } "" } }  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:00 " "Info: Fitter placement operations ending: elapsed time is 00:00:00" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Info: Fitter routing operations beginning" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:00 " "Info: Fitter routing operations ending: elapsed time is 00:00:00" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "Info: Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time." {  } {  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Fixed Delay Chain Operation " "Info: Completed Fixed Delay Chain Operation" {  } {  } 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0}