📄 srcout_s.lst
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C51 COMPILER V7.50 SRCOUT_S 05/26/2006 20:44:33 PAGE 1
C51 COMPILER V7.50, COMPILATION OF MODULE SRCOUT_S
OBJECT MODULE PLACED IN srcout_s.OBJ
COMPILER INVOKED BY: C:\Keil\C51\BIN\C51.EXE srcout_s.c BROWSE DEBUG OBJECTEXTEND
line level source
1 #pragma NOIV // Do not generate interrupt vectors
2 //-----------------------------------------------------------------------------
3 // File: srcout_s.c
4 // Contents: Hooks required to implement USB peripheral function.
5 // Code written for EZUSB FX2 128-pin REVE...
6 // Firmware tested on EZUSB FX2 128-pin (CY3681 DK)
7 // Copyright (c) 2001 Cypress Semiconductor All rights reserved
8 //-----------------------------------------------------------------------------
9 #include "fx2.h"
10 #include "fx2regs.h"
11 #include "fx2sdly.h" // SYNCDELAY macro
12
13 extern BOOL GotSUD; // Received setup data flag
14 extern BOOL Sleep;
15 extern BOOL Rwuen;
16 extern BOOL Selfpwr;
17
18 BYTE Configuration; // Current configuration
19 BYTE AlternateSetting; // Alternate settings
20
21 // ...debug LEDs: accessed via movx reads only ( through CPLD )
22 xdata volatile const BYTE LED0_ON _at_ 0x8000;
23 xdata volatile const BYTE LED0_OFF _at_ 0x8100;
24 xdata volatile const BYTE LED1_ON _at_ 0x9000;
25 xdata volatile const BYTE LED1_OFF _at_ 0x9100;
26 xdata volatile const BYTE LED2_ON _at_ 0xA000;
27 xdata volatile const BYTE LED2_OFF _at_ 0xA100;
28 xdata volatile const BYTE LED3_ON _at_ 0xB000;
29 xdata volatile const BYTE LED3_OFF _at_ 0xB100;
30 // it may be worth noting here that the default monitor loads at 0xC000
31
32 // use this global variable when (de)asserting debug LEDs...
33 BYTE ledX_rdvar = 0x00;
34
35 BYTE xdata Digit[] = { 0xC0, 0xf9, 0x64, 0x46, 0x4b, 0x52, 0x50, 0xc7, 0x40, 0x43, 0x41, 0x58, 0xf0, 0x4c,
- 0x70, 0x71 };
36
37 #define BTN_ADDR 0x38
38 #define LED_ADDR 0x39
39
40 BYTE num = 0;
41 BYTE display = TRUE;
42 //-----------------------------------------------------------------------------
43 // Task Dispatcher hooks
44 // The following hooks are called by the task dispatcher.
45 //-----------------------------------------------------------------------------
46 void TD_Init( void )
47 { // Called once at startup
48 1
49 1 CPUCS = 0x10; // CLKSPD[1:0]=10, for 48MHz operation
50 1 // CLKOE=0, don't drive CLKOUT
51 1
52 1 IFCONFIG = 0xCB;
53 1 // IFCLKSRC=1 , FIFOs executes on internal clk source
54 1 // xMHz=1 , 48MHz internal clk rate
C51 COMPILER V7.50 SRCOUT_S 05/26/2006 20:44:33 PAGE 2
55 1 // IFCLKOE=0 , Don't drive IFCLK pin signal at 48MHz
56 1 // IFCLKPOL=0 , Don't invert IFCLK pin signal from internal clk
57 1 // ASYNC=1 , master samples asynchronous
58 1 // GSTATE=0 , Don't drive GPIF states out on PORTE[2:0], debug WF
59 1 // IFCFG[1:0]=11, FX2 in slave FIFO mode
60 1
61 1
62 1 // Registers which require a synchronization delay, see section 15.14
63 1 // FIFORESET FIFOPINPOLAR
64 1 // INPKTEND OUTPKTEND
65 1 // EPxBCH:L REVCTL
66 1 // GPIFTCB3 GPIFTCB2
67 1 // GPIFTCB1 GPIFTCB0
68 1 // EPxFIFOPFH:L EPxAUTOINLENH:L
69 1 // EPxFIFOCFG EPxGPIFFLGSEL
70 1 // PINFLAGSxx EPxFIFOIRQ
71 1 // EPxFIFOIE GPIFIRQ
72 1 // GPIFIE GPIFADRH:L
73 1 // UDMACRCH:L EPxGPIFTRIG
74 1 // GPIFTRIG
75 1
76 1 // Note: The pre-REVE EPxGPIFTCH/L register are affected, as well...
77 1 // ...these have been replaced by GPIFTC[B3:B0] registers
78 1
79 1 SYNCDELAY; // see TRM section 15.14
80 1 REVCTL = 0x01; // use enhanced packet handling
81 1
82 1 // NOTE: when using "enhanced packet handling" feature (REVCTL.0=1)
83 1 // ...the core functions as follows:
84 1 // - OUTPKTEND is used to skip/commit OUT pkt.
85 1 // - INPKTEND is used to skip/commit IN pkt.
86 1 // - EPxBCH/L is used to
87 1 // - commit cpu sourced pkt.
88 1 // - modify length of an OUT pkt.
89 1 // - cpu can not source an OUT pkt in "AUTOOUT" mode
90 1 // - see cpu source out pkt method in BOOL DR_VendorCmnd(); ...
91 1
92 1 // EP2 512 BULK OUT 4x
93 1 SYNCDELAY; //
94 1 EP2CFG = 0xA0; // BUF[1:0]=00 for 4x buffering
95 1
96 1 // EP6 512 BULK IN 4x
97 1 SYNCDELAY; //
98 1 EP6CFG = 0xE0; // BUF[1:0]=00 for 4x buffering
99 1
100 1 // EP4 and EP8 are not used in this implementation...
101 1 SYNCDELAY; //
102 1 EP4CFG = 0x20; // clear valid bit
103 1 SYNCDELAY; //
104 1 EP8CFG = 0x60; // clear valid bit
105 1
106 1 SYNCDELAY; //
107 1 FIFORESET = 0x80; // activate NAK-ALL to avoid race conditions
108 1 SYNCDELAY; //
109 1 FIFORESET = 0x02; // reset, FIFO 2
110 1 SYNCDELAY; //
111 1 FIFORESET = 0x04; // reset, FIFO 4
112 1 SYNCDELAY; //
113 1 FIFORESET = 0x06; // reset, FIFO 6
114 1 SYNCDELAY; //
115 1 FIFORESET = 0x08; // reset, FIFO 8
116 1 SYNCDELAY; //
C51 COMPILER V7.50 SRCOUT_S 05/26/2006 20:44:33 PAGE 3
117 1 FIFORESET = 0x00; // deactivate NAK-ALL
118 1
119 1 // 8-bit bus (WORDWIDE=0)...
120 1
121 1 // use manual out mode...
122 1 SYNCDELAY; //
123 1 EP2FIFOCFG = 0x00; // AUTOOUT=0, WORDWIDE=0
124 1
125 1 SYNCDELAY; //
126 1 OUTPKTEND = 0x82; // arm first buffer
127 1 SYNCDELAY; //
128 1 OUTPKTEND = 0x82; // arm second buffer
129 1 SYNCDELAY; //
130 1 OUTPKTEND = 0x82; // arm third buffer
131 1 SYNCDELAY; //
132 1 OUTPKTEND = 0x82; // arm fourth buffer
133 1
134 1 // use auto in mode
135 1 SYNCDELAY; //
136 1 EP6FIFOCFG = 0x0C; // AUTOIN=1, ZEROLENIN=1, WORDWIDE=0
137 1 }
138
139 void TD_Poll( void )
140 { // Called repeatedly while the device is idle
141 1
142 1 // see BOOL DR_VendorCmnd( void );
143 1 // ...core "auto" commits pkts using EP6AUTOINLENH/L value
144 1
145 1 }
146
147 BOOL TD_Suspend( void )
148 { // Called before the device goes into suspend mode
149 1 return( TRUE );
150 1 }
151
152 BOOL TD_Resume( void )
153 { // Called after the device resumes
154 1 return( TRUE );
155 1 }
156
157 //-----------------------------------------------------------------------------
158 // Device Request hooks
159 // The following hooks are called by the end point 0 device request parser.
160 //-----------------------------------------------------------------------------
161 BOOL DR_GetDescriptor( void )
162 {
163 1 return( TRUE );
164 1 }
165
166 BOOL DR_SetConfiguration( void )
167 { // Called when a Set Configuration command is received
168 1
169 1 if( EZUSB_HIGHSPEED( ) )
170 1 { // ...FX2 in high speed mode
171 2 SYNCDELAY; //
172 2 EP6AUTOINLENH = 0x02; // set core AUTO commit len = 512 bytes
173 2 SYNCDELAY; //
174 2 EP6AUTOINLENL = 0x00;
175 2 SYNCDELAY; //
176 2 }
177 1 else
178 1 { // ...FX2 in full speed mode
C51 COMPILER V7.50 SRCOUT_S 05/26/2006 20:44:33 PAGE 4
179 2 SYNCDELAY; //
180 2 EP6AUTOINLENH = 0x00; // set core AUTO commit len = 64 bytes
181 2 SYNCDELAY; //
182 2 EP6AUTOINLENL = 0x40;
183 2 SYNCDELAY; //
184 2 }
185 1
186 1 Configuration = SETUPDAT[ 2 ];
187 1 return( TRUE ); // Handled by user code
188 1 }
189
190 BOOL DR_GetConfiguration( void )
191 { // Called when a Get Configuration command is received
192 1 EP0BUF[ 0 ] = Configuration;
193 1 EP0BCH = 0;
194 1 EP0BCL = 1;
195 1 return(TRUE); // Handled by user code
196 1 }
197
198 BOOL DR_SetInterface( void )
199 { // Called when a Set Interface command is received
200 1 AlternateSetting = SETUPDAT[ 2 ];
201 1 return( TRUE ); // Handled by user code
202 1 }
203
204 BOOL DR_GetInterface( void )
205 { // Called when a Set Interface command is received
206 1 EP0BUF[ 0 ] = AlternateSetting;
207 1 EP0BCH = 0;
208 1 EP0BCL = 1;
209 1 return( TRUE ); // Handled by user code
210 1 }
211
212 BOOL DR_GetStatus( void )
213 {
214 1 return( TRUE );
215 1 }
216
217 BOOL DR_ClearFeature( void )
218 {
219 1 return( TRUE );
220 1 }
221
222 BOOL DR_SetFeature( void )
223 {
224 1 return( TRUE );
225 1 }
226
227 #define VX_B2 0xB2 // turn ON debug LEDs...
228 #define VX_B3 0xB3 // turn OFF debug LEDs...
229
230 #define VX_B7 0xB7 // re-initialize, call TD_Init( );
231 #define VX_B8 0xB8 // do a "soft reset", vector to org 00h
232 #define VX_BA 0xBA // commit out pkt. new way
233 #define VX_BB 0xBB // commit in pkt. new way
234 #define VX_C2 0xC2 // source out pkt.
235
236
237 #define VX_BC 0xBC // turn OFF debug LEDs...
238 #define VX_BD 0xBD // turn OFF debug LEDs...
239 #define VX_BE 0xBE // turn OFF debug LEDs...
240 #define VX_BF 0xBF // turn OFF debug LEDs...
C51 COMPILER V7.50 SRCOUT_S 05/26/2006 20:44:33 PAGE 5
241
242 #define VX_C3 0xC3 // turn OFF debug LEDs...
243
244
245 // Core uses bRequest value 0xA0 for Anchor downloads/uploads...
246 // Cypress Semiconductor reserves bRequest values 0xA1 through 0xAF...
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