prev_cmp_kkd.qmsg

基于ATEREAL EPM1270T144C5N CPLD 压力传感器数据采集源码 开发软件 Quartus II

{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "trig_two_to_one.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file trig_two_to_one.v" { { "Info" "ISGN_ENTITY_NAME" "1 trig_two_to_one " "Info: Found entity 1: trig_two_to_one" {  } { { "trig_two_to_one.v" "" { Text "F:/suns_gongsi/for_extent/test_cpld_1/test_cpld/trig_two_to_one.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "dram_tmp.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file dram_tmp.v" { { "Info" "ISGN_ENTITY_NAME" "1 dram_tmp " "Info: Found entity 1: dram_tmp" {  } { { "dram_tmp.v" "" { Text "F:/suns_gongsi/for_extent/test_cpld_1/test_cpld/dram_tmp.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "fenpin200.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file fenpin200.v" { { "Info" "ISGN_ENTITY_NAME" "1 fenpin200 " "Info: Found entity 1: fenpin200" {  } { { "fenpin200.v" "" { Text "F:/suns_gongsi/for_extent/test_cpld_1/test_cpld/fenpin200.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "xw_filter.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file xw_filter.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 xw_filter " "Info: Found entity 1: xw_filter" {  } { { "xw_filter.bdf" "" { Schematic "F:/suns_gongsi/for_extent/test_cpld_1/test_cpld/xw_filter.bdf" { } } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "limit_data.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file limit_data.v" { { "Info" "ISGN_ENTITY_NAME" "1 limit_data " "Info: Found entity 1: limit_data" {  } { { "limit_data.v" "" { Text "F:/suns_gongsi/for_extent/test_cpld_1/test_cpld/limit_data.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "sdi_buf0.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file sdi_buf0.v" { { "Info" "ISGN_ENTITY_NAME" "1 sdi_buf0 " "Info: Found entity 1: sdi_buf0" {  } { { "sdi_buf0.v" "" { Text "F:/suns_gongsi/for_extent/test_cpld_1/test_cpld/sdi_buf0.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "xw_logic.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file xw_logic.v" { { "Info" "ISGN_ENTITY_NAME" "1 xw_logic " "Info: Found entity 1: xw_logic" {  } { { "xw_logic.v" "" { Text "F:/suns_gongsi/for_extent/test_cpld_1/test_cpld/xw_logic.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "position_moudle.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file position_moudle.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 position_moudle " "Info: Found entity 1: position_moudle" {  } { { "position_moudle.bdf" "" { Schematic "F:/suns_gongsi/for_extent/test_cpld_1/test_cpld/position_moudle.bdf" { } } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 0}
{ "Warning" "WVRFX_L3_VERI_MIXED_BLOCKING_NONBLOCKING_ASSIGNMENT" "posi.v(14) " "Warning (10268): Verilog HDL information at posi.v(14): always construct contains both blocking and non-blocking assignments" {  } { { "posi.v" "" { Text "F:/suns_gongsi/for_extent/test_cpld_1/test_cpld/posi.v" 14 0 0 } }  } 0 10268 "Verilog HDL information at %1!s!: always construct contains both blocking and non-blocking assignments" 1 0 "" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "posi.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file posi.v" { { "Info" "ISGN_ENTITY_NAME" "1 posi " "Info: Found entity 1: posi" {  } { { "posi.v" "" { Text "F:/suns_gongsi/for_extent/test_cpld_1/test_cpld/posi.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "kkd " "Info: Elaborating entity \"kkd\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "X704X X704X:inst30 " "Info: Elaborating entity \"X704X\" for hierarchy \"X704X:inst30\"" {  } { { "kkd.bdf" "inst30" { Schematic "F:/suns_gongsi/for_extent/test_cpld_1/test_cpld/kkd.bdf" { { 1344 1480 1576 1400 "inst30" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "xx4x xx4x:inst15 " "Info: Elaborating entity \"xx4x\" for hierarchy \"xx4x:inst15\"" {  } { { "kkd.bdf" "inst15" { Schematic "F:/suns_gongsi/for_extent/test_cpld_1/test_cpld/kkd.bdf" { { 1344 1360 1456 1400 "inst15" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "xx165x xx165x:inst52 " "Info: Elaborating entity \"xx165x\" for hierarchy \"xx165x:inst52\"" {  } { { "kkd.bdf" "inst52" { Schematic "F:/suns_gongsi/for_extent/test_cpld_1/test_cpld/kkd.bdf" { { 1304 1144 1240 1416 "inst52" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "com_to_lpt com_to_lpt:inst2 " "Info: Elaborating entity \"com_to_lpt\" for hierarchy \"com_to_lpt:inst2\"" {  } { { "kkd.bdf" "inst2" { Schematic "F:/suns_gongsi/for_extent/test_cpld_1/test_cpld/kkd.bdf" { { 1312 784 968 1472 "inst2" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "fenpin1000 fenpin1000:inst55 " "Info: Elaborating entity \"fenpin1000\" for hierarchy \"fenpin1000:inst55\"" {  } { { "kkd.bdf" "inst55" { Schematic "F:/suns_gongsi/for_extent/test_cpld_1/test_cpld/kkd.bdf" { { 1744 504 600 1840 "inst55" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "fenpin2 fenpin2:inst1 " "Info: Elaborating entity \"fenpin2\" for hierarchy \"fenpin2:inst1\"" {  } { { "kkd.bdf" "inst1" { Schematic "F:/suns_gongsi/for_extent/test_cpld_1/test_cpld/kkd.bdf" { { 1632 504 600 1728 "inst1" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "sent_buf sent_buf:inst " "Info: Elaborating entity \"sent_buf\" for hierarchy \"sent_buf:inst\"" {  } { { "kkd.bdf" "inst" { Schematic "F:/suns_gongsi/for_extent/test_cpld_1/test_cpld/kkd.bdf" { { 1320 488 616 1416 "inst" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "fw_delay fw_delay:inst4 " "Info: Elaborating entity \"fw_delay\" for hierarchy \"fw_delay:inst4\"" {  } { { "kkd.bdf" "inst4" { Schematic "F:/suns_gongsi/for_extent/test_cpld_1/test_cpld/kkd.bdf" { { 1472 504 600 1568 "inst4" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 0}