kkd.map.rpt

基于ATEREAL EPM1270T144C5N CPLD 压力传感器数据采集源码 开发软件 Quartus II

Analysis & Synthesis report for kkd
Wed Oct 15 16:06:19 2008
Quartus II Version 6.1 Build 201 11/27/2006 SJ Full Version


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. Analysis & Synthesis Summary
  3. Analysis & Synthesis Settings
  4. Analysis & Synthesis Source Files Read
  5. Analysis & Synthesis Resource Usage Summary
  6. Analysis & Synthesis Resource Utilization by Entity
  7. State Machine - |kkd|test_cpld_to_dsp:inst66|now_st
  8. State Machine - |kkd|sent_buf:inst|now_data
  9. State Machine - |kkd|com_to_lpt:inst2|current_state
 10. Logic Cells Representing Combinational Loops
 11. Registers Removed During Synthesis
 12. General Register Statistics
 13. Inverted Register Statistics
 14. Multiplexer Restructuring Statistics (Restructuring Performed)
 15. Parameter Settings for User Entity Instance: com_to_lpt:inst2
 16. Parameter Settings for User Entity Instance: sent_buf:inst
 17. Parameter Settings for User Entity Instance: test_cpld_to_dsp:inst66
 18. Analysis & Synthesis Messages
 19. Analysis & Synthesis Suppressed Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2006 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+------------------------------------------------------------------------+
; Analysis & Synthesis Summary                                           ;
+-----------------------------+------------------------------------------+
; Analysis & Synthesis Status ; Successful - Wed Oct 15 16:06:19 2008    ;
; Quartus II Version          ; 6.1 Build 201 11/27/2006 SJ Full Version ;
; Revision Name               ; kkd                                      ;
; Top-level Entity Name       ; kkd                                      ;
; Family                      ; MAX II                                   ;
; Total logic elements        ; 907                                      ;
; Total pins                  ; 41                                       ;
; Total virtual pins          ; 0                                        ;
; UFM blocks                  ; 0                                        ;
+-----------------------------+------------------------------------------+


+--------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Settings                                                                                ;
+--------------------------------------------------------------------+--------------------+--------------------+
; Option                                                             ; Setting            ; Default Value      ;
+--------------------------------------------------------------------+--------------------+--------------------+
; Device                                                             ; EPM1270T144C5      ;                    ;
; Top-level entity name                                              ; kkd                ; kkd                ;
; Family name                                                        ; MAX II             ; Stratix            ;