dds_top.map.summary

FPGA，vhdl语言的学习资料

Analysis & Synthesis Status : Successful - Sat May 05 19:28:20 2007
Quartus II Version : 7.0 Build 33 02/05/2007 SJ Full Version
Revision Name : dds_top
Top-level Entity Name : dds_top
Family : Stratix
Total logic elements : N/A until Partition Merge
Total pins : N/A until Partition Merge
Total virtual pins : N/A until Partition Merge
Total memory bits : N/A until Partition Merge
DSP block 9-bit elements : N/A until Partition Merge
Total PLLs : N/A until Partition Merge
Total DLLs : N/A until Partition Merge