📄 vga.fit.eqn
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-- Copyright (C) 1991-2006 Altera Corporation
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-- and other software and tools, and its AMPP partner logic
-- functions, and any output files any of the foregoing
-- (including device programming or simulation files), and any
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-- without limitation, that your use is for the sole purpose of
-- programming logic devices manufactured by Altera and sold by
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--B1_LL[6] is VGAsignal:inst1|LL[6] at LC_X13_Y7_N7
--operation mode is normal
B1_LL[6]_lut_out = B1L55 & (!B1L8 # !B1_LL[0] # !B1L9);
B1_LL[6] = DFFEAS(B1_LL[6]_lut_out, !GLOBAL(B1_CC[4]), VCC, , , , , , );
--B1_LL[5] is VGAsignal:inst1|LL[5] at LC_X13_Y7_N6
--operation mode is normal
B1_LL[5]_lut_out = B1L58 & (!B1_LL[0] # !B1L8 # !B1L9);
B1_LL[5] = DFFEAS(B1_LL[5]_lut_out, !GLOBAL(B1_CC[4]), VCC, , , , , , );
--B1_LL[7] is VGAsignal:inst1|LL[7] at LC_X14_Y7_N5
--operation mode is normal
B1_LL[7]_lut_out = B1L65 & (!B1L9 # !B1_LL[0] # !B1L8);
B1_LL[7] = DFFEAS(B1_LL[7]_lut_out, !GLOBAL(B1_CC[4]), VCC, , , , , , );
--B1L34 is VGAsignal:inst1|GRBY[2]~813 at LC_X13_Y7_N5
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.
B1_LL[4]_qfbk = B1_LL[4];
B1L34 = B1_LL[5] & B1_LL[6] & B1_LL[4]_qfbk & B1_LL[7];
--B1_LL[4] is VGAsignal:inst1|LL[4] at LC_X13_Y7_N5
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.
B1_LL[4] = DFFEAS(B1L34, !GLOBAL(B1_CC[4]), VCC, , , B1L61, , , VCC);
--B1L35 is VGAsignal:inst1|GRBY[2]~814 at LC_X14_Y7_N1
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.
B1_LL[3]_qfbk = B1_LL[3];
B1L35 = !B1_LL[6] # !B1_LL[3]_qfbk # !B1_LL[5] # !B1_LL[4];
--B1_LL[3] is VGAsignal:inst1|LL[3] at LC_X14_Y7_N1
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.
B1_LL[3] = DFFEAS(B1L35, !GLOBAL(B1_CC[4]), VCC, , , B1L68, , , VCC);
--B1_LL[8] is VGAsignal:inst1|LL[8] at LC_X12_Y7_N9
--operation mode is normal
B1_LL[8]_lut_out = B1L71 & (!B1L9 # !B1_LL[0] # !B1L8);
B1_LL[8] = DFFEAS(B1_LL[8]_lut_out, !GLOBAL(B1_CC[4]), VCC, , , , , , );
--B1L36 is VGAsignal:inst1|GRBY[2]~815 at LC_X13_Y7_N0
--operation mode is normal
B1L36 = !B1_LL[8] & (B1L34 # !B1_LL[7] & B1L35);
--B1L39 is VGAsignal:inst1|GRBY~816 at LC_X14_Y7_N8
--operation mode is normal
B1L39 = !B1_LL[4] & !B1_LL[3] # !B1_LL[6] # !B1_LL[5];
--B1L37 is VGAsignal:inst1|GRBY[2]~817 at LC_X13_Y7_N1
--operation mode is normal
B1L37 = B1L36 # B1_LL[8] & B1L39 & !B1_LL[7];
--B1_CC[2] is VGAsignal:inst1|CC[2] at LC_X12_Y3_N4
--operation mode is normal
B1_CC[2]_lut_out = B1L72 & !B1L10;
B1_CC[2] = DFFEAS(B1_CC[2]_lut_out, GLOBAL(B1_FS[5]), VCC, , , , , , );
--B1_CC[3] is VGAsignal:inst1|CC[3] at LC_X13_Y3_N7
--operation mode is normal
B1_CC[3]_lut_out = B1L75 & !B1L10;
B1_CC[3] = DFFEAS(B1_CC[3]_lut_out, GLOBAL(B1_FS[5]), VCC, , , , , , );
--B1_CC[1] is VGAsignal:inst1|CC[1] at LC_X12_Y3_N3
--operation mode is normal
B1_CC[1]_lut_out = !B1L10 & (B1L78);
B1_CC[1] = DFFEAS(B1_CC[1]_lut_out, GLOBAL(B1_FS[5]), VCC, , , , , , );
--B1_CC[4] is VGAsignal:inst1|CC[4] at LC_X12_Y3_N1
--operation mode is normal
B1_CC[4]_lut_out = !B1L10 & B1L81;
B1_CC[4] = DFFEAS(B1_CC[4]_lut_out, GLOBAL(B1_FS[5]), VCC, , , , , , );
--B1L26 is VGAsignal:inst1|GRBX[2]~516 at LC_X12_Y3_N0
--operation mode is normal
B1L26 = B1_CC[2] & !B1_CC[4] & (B1_CC[3] # !B1_CC[1]) # !B1_CC[2] & !B1_CC[3] & (!B1_CC[1] # !B1_CC[4]);
--B1_MMD[0] is VGAsignal:inst1|MMD[0] at LC_X15_Y7_N0
--operation mode is normal
B1_MMD[0]_lut_out = !B1_MMD[0] & !B1_MMD[1];
B1_MMD[0] = DFFEAS(B1_MMD[0]_lut_out, GLOBAL(reset), VCC, , , , , , );
--B1_MMD[1] is VGAsignal:inst1|MMD[1] at LC_X15_Y7_N9
--operation mode is normal
B1_MMD[1]_lut_out = B1_MMD[0] & !B1_MMD[1];
B1_MMD[1] = DFFEAS(B1_MMD[1]_lut_out, GLOBAL(reset), VCC, , , , , , );
--B1L21 is VGAsignal:inst1|GRBP[2]~752 at LC_X13_Y7_N2
--operation mode is normal
B1L21 = B1_MMD[0] & !B1_MMD[1] & (B1L37) # !B1_MMD[0] & (B1L26 $ (B1_MMD[1] & B1L37));
--B1L8 is VGAsignal:inst1|Equal~222 at LC_X14_Y7_N9
--operation mode is normal
B1L8 = B1_LL[5] & B1_LL[6] & B1_LL[7] & B1_LL[8];
--B1L50 is VGAsignal:inst1|LessThan~988 at LC_X13_Y3_N5
--operation mode is normal
B1L50 = B1_CC[3] & B1_CC[4];
--B1_R is VGAsignal:inst1|R at LC_X13_Y7_N3
--operation mode is normal
B1_R = !B1L50 & !B1L8 & (reset $ B1L21);
--B1L38 is VGAsignal:inst1|GRBY[3]~818 at LC_X13_Y7_N8
--operation mode is normal
B1L38 = !B1_LL[8] & (!B1L34);
--B1L27 is VGAsignal:inst1|GRBX[3]~517 at LC_X12_Y3_N2
--operation mode is normal
B1L27 = !B1_CC[4] & (!B1_CC[3] # !B1_CC[2]);
--B1L22 is VGAsignal:inst1|GRBP[3]~753 at LC_X13_Y7_N9
--operation mode is normal
B1L22 = B1_MMD[0] & !B1_MMD[1] & (B1L38) # !B1_MMD[0] & (B1L27 $ (B1_MMD[1] & B1L38));
--B1_G is VGAsignal:inst1|G at LC_X13_Y7_N4
--operation mode is normal
B1_G = !B1L50 & !B1L8 & (reset $ B1L22);
--B1L28 is VGAsignal:inst1|GRBY[1]~819 at LC_X14_Y7_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.
B1_LL[2]_qfbk = B1_LL[2];
B1L28 = B1_LL[7] & (B1_LL[3] # B1_LL[2]_qfbk # B1_LL[6]) # !B1_LL[7] & B1_LL[3] & (B1_LL[2]_qfbk # B1_LL[6]);
--B1_LL[2] is VGAsignal:inst1|LL[2] at LC_X14_Y7_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.
B1_LL[2] = DFFEAS(B1L28, !GLOBAL(B1_CC[4]), VCC, , , B1L82, , , VCC);
--B1L29 is VGAsignal:inst1|GRBY[1]~820 at LC_X14_Y7_N3
--operation mode is normal
B1L29 = B1_LL[6] $ (!B1L28 # !B1_LL[5] # !B1_LL[4]);
--B1L30 is VGAsignal:inst1|GRBY[1]~821 at LC_X14_Y7_N0
--operation mode is normal
B1L30 = !B1_LL[7] & !B1L39;
--B1L31 is VGAsignal:inst1|GRBY[1]~822 at LC_X14_Y7_N6
--operation mode is normal
B1L31 = B1_LL[3] & !B1_LL[7] & !B1_LL[2] # !B1_LL[3] & (!B1_LL[2] # !B1_LL[7]);
--B1L32 is VGAsignal:inst1|GRBY[1]~823 at LC_X14_Y7_N7
--operation mode is normal
B1L32 = !B1_LL[6] & (!B1_LL[4] & B1L31 # !B1_LL[5]);
--B1L33 is VGAsignal:inst1|GRBY[1]~824 at LC_X14_Y7_N4
--operation mode is normal
B1L33 = B1_LL[8] & (B1L32 # B1L30) # !B1_LL[8] & (B1L29);
--B1L23 is VGAsignal:inst1|GRBX[1]~518 at LC_X13_Y3_N3
--operation mode is normal
B1L23 = B1_CC[3] $ (!B1_CC[4] & B1_CC[1]);
--B1L24 is VGAsignal:inst1|GRBX[1]~519 at LC_X13_Y3_N2
--operation mode is normal
B1L24 = B1_CC[1] & B1_CC[3] # !B1_CC[1] & (B1_CC[4]);
--B1L25 is VGAsignal:inst1|GRBX[1]~520 at LC_X13_Y3_N4
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.
B1_CC[0]_qfbk = B1_CC[0];
B1L25 = B1_CC[0]_qfbk & !B1L24 & (B1_CC[2] $ !B1L23) # !B1_CC[0]_qfbk & (B1L24 $ (B1L23 # !B1_CC[2]));
--B1_CC[0] is VGAsignal:inst1|CC[0] at LC_X13_Y3_N4
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.
B1_CC[0] = DFFEAS(B1L25, GLOBAL(B1_FS[5]), VCC, , , B1L85, , , VCC);
--B1L20 is VGAsignal:inst1|GRBP[1]~754 at LC_X15_Y7_N2
--operation mode is normal
B1L20 = B1_MMD[0] & !B1_MMD[1] & (B1L33) # !B1_MMD[0] & (B1L25 $ (B1_MMD[1] & B1L33));
--B1_B is VGAsignal:inst1|B at LC_X15_Y7_N3
--operation mode is normal
B1_B = !B1L50 & !B1L8 & (reset $ B1L20);
--B1L55 is VGAsignal:inst1|add~329 at LC_X12_Y7_N6
--operation mode is arithmetic
B1L55_carry_eqn = (!B1L62 & B1L59) # (B1L62 & B1L60);
B1L55 = B1_LL[6] $ (!B1L55_carry_eqn);
--B1L56 is VGAsignal:inst1|add~331 at LC_X12_Y7_N6
--operation mode is arithmetic
B1L56_cout_0 = B1_LL[6] & (!B1L59);
B1L56 = CARRY(B1L56_cout_0);
--B1L57 is VGAsignal:inst1|add~331COUT1_459 at LC_X12_Y7_N6
--operation mode is arithmetic
B1L57_cout_1 = B1_LL[6] & (!B1L60);
B1L57 = CARRY(B1L57_cout_1);
--B1_LL[0] is VGAsignal:inst1|LL[0] at LC_X11_Y7_N7
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.
B1_LL[0]_lut_out = GND;
B1_LL[0] = DFFEAS(B1_LL[0]_lut_out, !GLOBAL(B1_CC[4]), VCC, , , B1L88, , , VCC);
--B1_LL[1] is VGAsignal:inst1|LL[1] at LC_X11_Y7_N2
--operation mode is normal
B1_LL[1]_lut_out = B1L91 & (!B1L9 # !B1_LL[0] # !B1L8);
B1_LL[1] = DFFEAS(B1_LL[1]_lut_out, !GLOBAL(B1_CC[4]), VCC, , , , , , );
--B1L9 is VGAsignal:inst1|Equal~223 at LC_X11_Y7_N4
--operation mode is normal
B1L9 = !B1_LL[4] & !B1_LL[1] & !B1_LL[3] & !B1_LL[2];
--B1L58 is VGAsignal:inst1|add~334 at LC_X12_Y7_N5
--operation mode is arithmetic
B1L58_carry_eqn = (!B1L62 & GND) # (B1L62 & VCC);
B1L58 = B1_LL[5] $ (B1L58_carry_eqn);
--B1L59 is VGAsignal:inst1|add~336 at LC_X12_Y7_N5
--operation mode is arithmetic
B1L59_cout_0 = !B1L62 # !B1_LL[5];
B1L59 = CARRY(B1L59_cout_0);
--B1L60 is VGAsignal:inst1|add~336COUT1_457 at LC_X12_Y7_N5
--operation mode is arithmetic
B1L60_cout_1 = !B1L62 # !B1_LL[5];
B1L60 = CARRY(B1L60_cout_1);
--B1L61 is VGAsignal:inst1|add~339 at LC_X12_Y7_N4
--operation mode is arithmetic
B1L61 = B1_LL[4] $ !B1L69;
--B1L62 is VGAsignal:inst1|add~341 at LC_X12_Y7_N4
--operation mode is arithmetic
B1L62 = B1L63;
--B1L65 is VGAsignal:inst1|add~344 at LC_X12_Y7_N7
--operation mode is arithmetic
B1L65_carry_eqn = (!B1L62 & B1L56) # (B1L62 & B1L57);
B1L65 = B1_LL[7] $ B1L65_carry_eqn;
--B1L66 is VGAsignal:inst1|add~346 at LC_X12_Y7_N7
--operation mode is arithmetic
B1L66_cout_0 = !B1L56 # !B1_LL[7];
B1L66 = CARRY(B1L66_cout_0);
--B1L67 is VGAsignal:inst1|add~346COUT1_461 at LC_X12_Y7_N7
--operation mode is arithmetic
B1L67_cout_1 = !B1L57 # !B1_LL[7];
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