insn_basic.def

来自「The Valgrind distribution has multiple t」· DEF 代码 · 共 1,129 行 · 第 1/5 页

###cmpl m32.sd[-100] r32.sd[2147483600] => eflags[0x800,0x800]
cmpq imm8[3] r64.uq[2] => eflags[0x010,0x010]
cmpq imm8[2] r64.uq[3] => eflags[0x010,0x000]
cmpq imm8[12] r64.uq[12] => eflags[0x044,0x044]
cmpq imm8[12] r64.uq[34] => eflags[0x044,0x000]
cmpq imm8[34] r64.uq[12] => eflags[0x081,0x081]
cmpq imm8[12] r64.uq[34] => eflags[0x081,0x000]
cmpq imm8[100] r64.sq[-9223372036854775800] => eflags[0x800,0x800]
cmpq imm8[50] r64.sq[-50] => eflags[0x800,0x000]
cmpq imm8[-50] r64.sq[50] => eflags[0x800,0x000]
cmpq imm8[-100] r64.sq[9223372036854775800] => eflags[0x800,0x800]
cmpq imm8[3] m64.uq[2] => eflags[0x010,0x010]
cmpq imm8[2] m64.uq[3] => eflags[0x010,0x000]
cmpq imm8[12] m64.uq[12] => eflags[0x044,0x044]
cmpq imm8[12] m64.uq[34] => eflags[0x044,0x000]
cmpq imm8[34] m64.uq[12] => eflags[0x081,0x081]
cmpq imm8[12] m64.uq[34] => eflags[0x081,0x000]
cmpq imm8[100] m64.sq[-9223372036854775800] => eflags[0x800,0x800]
cmpq imm8[50] m64.sq[-50] => eflags[0x800,0x000]
cmpq imm8[-50] m64.sq[50] => eflags[0x800,0x000]
cmpq imm8[-100] m64.sq[9223372036854775800] => eflags[0x800,0x800]
cmpq imm32[3] rax.uq[2] => eflags[0x010,0x010]
cmpq imm32[2] rax.uq[3] => eflags[0x010,0x000]
cmpq imm32[12] rax.uq[12] => eflags[0x044,0x044]
cmpq imm32[12] rax.uq[34] => eflags[0x044,0x000]
cmpq imm32[34] rax.uq[12] => eflags[0x081,0x081]
cmpq imm32[12] rax.uq[34] => eflags[0x081,0x000]
cmpq imm32[100] rax.sq[-9223372036854775800] => eflags[0x800,0x800]
cmpq imm32[50] rax.sq[-50] => eflags[0x800,0x000]
cmpq imm32[-50] rax.sq[50] => eflags[0x800,0x000]
cmpq imm32[-100] rax.sq[9223372036854775800] => eflags[0x800,0x800]
cmpq imm32[3] r64.uq[2] => eflags[0x010,0x010]
cmpq imm32[2] r64.uq[3] => eflags[0x010,0x000]
cmpq imm32[12] r64.uq[12] => eflags[0x044,0x044]
cmpq imm32[12] r64.uq[34] => eflags[0x044,0x000]
cmpq imm32[34] r64.uq[12] => eflags[0x081,0x081]
cmpq imm32[12] r64.uq[34] => eflags[0x081,0x000]
cmpq imm32[100] r64.sq[-9223372036854775800] => eflags[0x800,0x800]
cmpq imm32[50] r64.sq[-50] => eflags[0x800,0x000]
cmpq imm32[-50] r64.sq[50] => eflags[0x800,0x000]
cmpq imm32[-100] r64.sq[9223372036854775800] => eflags[0x800,0x800]
cmpq imm32[3] m64.uq[2] => eflags[0x010,0x010]
cmpq imm32[2] m64.uq[3] => eflags[0x010,0x000]
cmpq imm32[12] m64.uq[12] => eflags[0x044,0x044]
cmpq imm32[12] m64.uq[34] => eflags[0x044,0x000]
cmpq imm32[34] m64.uq[12] => eflags[0x081,0x081]
cmpq imm32[12] m64.uq[34] => eflags[0x081,0x000]
cmpq imm32[100] m64.sq[-9223372036854775800] => eflags[0x800,0x800]
cmpq imm32[50] m64.sq[-50] => eflags[0x800,0x000]
cmpq imm32[-50] m64.sq[50] => eflags[0x800,0x000]
cmpq imm32[-100] m64.sq[9223372036854775800] => eflags[0x800,0x800]
cmpq r64.uq[3] r64.uq[2] => eflags[0x010,0x010]
cmpq r64.uq[2] r64.uq[3] => eflags[0x010,0x000]
cmpq r64.uq[12] r64.uq[12] => eflags[0x044,0x044]
cmpq r64.uq[12] r64.uq[34] => eflags[0x044,0x000]
cmpq r64.uq[34] r64.uq[12] => eflags[0x081,0x081]
cmpq r64.uq[12] r64.uq[34] => eflags[0x081,0x000]
cmpq r64.uq[100] r64.sq[-9223372036854775800] => eflags[0x800,0x800]
cmpq r64.uq[50] r64.sq[-50] => eflags[0x800,0x000]
cmpq r64.sq[-50] r64.sq[50] => eflags[0x800,0x000]
cmpq r64.sq[-100] r64.sq[9223372036854775800] => eflags[0x800,0x800]
cmpq r64.uq[3] m64.uq[2] => eflags[0x010,0x010]
cmpq r64.uq[2] m64.uq[3] => eflags[0x010,0x000]
cmpq r64.uq[12] m64.uq[12] => eflags[0x044,0x044]
cmpq r64.uq[12] m64.uq[34] => eflags[0x044,0x000]
cmpq r64.uq[34] m64.uq[12] => eflags[0x081,0x081]
cmpq r64.uq[12] m64.uq[34] => eflags[0x081,0x000]
cmpq r64.uq[100] m64.sq[-9223372036854775800] => eflags[0x800,0x800]
cmpq r64.uq[50] m64.sq[-50] => eflags[0x800,0x000]
cmpq r64.sq[-50] m64.sq[50] => eflags[0x800,0x000]
cmpq r64.sq[-100] m64.sq[9223372036854775800] => eflags[0x800,0x800]
cmpq m64.uq[3] r64.uq[2] => eflags[0x010,0x010]
cmpq m64.uq[2] r64.uq[3] => eflags[0x010,0x000]
cmpq m64.uq[12] r64.uq[12] => eflags[0x044,0x044]
cmpq m64.uq[12] r64.uq[34] => eflags[0x044,0x000]
cmpq m64.uq[34] r64.uq[12] => eflags[0x081,0x081]
cmpq m64.uq[12] r64.uq[34] => eflags[0x081,0x000]
cmpq m64.uq[100] r64.sq[-9223372036854775800] => eflags[0x800,0x800]
cmpq m64.uq[50] r64.sq[-50] => eflags[0x800,0x000]
cmpq m64.sq[-50] r64.sq[50] => eflags[0x800,0x000]
cmpq m64.sq[-100] r64.sq[9223372036854775800] => eflags[0x800,0x800]
###cmpxchgb eflags[0x40,0x00] al.ub[12] : r8.ub[56] r8.ub[12] => eflags[0x40,0x40] al.ub[12] 0.ub[56] 1.ub[56]
###cmpxchgb eflags[0x40,0x40] al.ub[12] : r8.ub[56] r8.ub[34] => eflags[0x40,0x00] al.ub[34] 0.ub[56] 1.ub[34]
###cmpxchgb eflags[0x40,0x00] al.ub[12] : r8.ub[56] m8.ub[12] => eflags[0x40,0x40] al.ub[12] 0.ub[56] 1.ub[56]
###cmpxchgb eflags[0x40,0x40] al.ub[12] : r8.ub[56] m8.ub[34] => eflags[0x40,0x00] al.ub[34] 0.ub[56] 1.ub[34]
###cmpxchgw eflags[0x40,0x00] ax.uw[123] : r16.uw[567] r16.uw[123] => eflags[0x40,0x40] ax.uw[123] 0.uw[567] 1.uw[567]
###cmpxchgw eflags[0x40,0x40] ax.uw[123] : r16.uw[567] r16.uw[345] => eflags[0x40,0x00] ax.uw[345] 0.uw[567] 1.uw[345]
cmpxchgw eflags[0x40,0x00] ax.uw[123] : r16.uw[567] m16.uw[123] => eflags[0x40,0x40] ax.uw[123] 0.uw[567] 1.uw[567]
###cmpxchgw eflags[0x40,0x40] ax.uw[123] : r16.uw[567] m16.uw[345] => eflags[0x40,0x00] ax.uw[345] 0.uw[567] 1.uw[345]
###cmpxchgl eflags[0x40,0x00] eax.ud[1234] : r32.ud[5678] r32.ud[1234] => eflags[0x40,0x40] eax.ud[1234] 0.ud[5678] 1.ud[5678]
###cmpxchgl eflags[0x40,0x40] eax.ud[1234] : r32.ud[5678] r32.ud[3456] => eflags[0x40,0x00] eax.ud[3456] 0.ud[5678] 1.ud[3456]
cmpxchgl eflags[0x40,0x00] eax.ud[1234] : r32.ud[5678] m32.ud[1234] => eflags[0x40,0x40] eax.ud[1234] 0.ud[5678] 1.ud[5678]
cmpxchgl eflags[0x40,0x40] eax.ud[1234] : r32.ud[5678] m32.ud[3456] => eflags[0x40,0x00] eax.ud[3456] 0.ud[5678] 1.ud[3456]
###cmpxchgq eflags[0x40,0x00] rax.uq[12345] : r64.uq[56789] r64.uq[12345] => eflags[0x40,0x40] rax.uq[12345] 0.uq[56789] 1.uq[56789]
###cmpxchgq eflags[0x40,0x40] rax.uq[12345] : r64.uq[56789] r64.uq[34567] => eflags[0x40,0x00] rax.uq[34567] 0.uq[56789] 1.uq[34567]
cmpxchgq eflags[0x40,0x00] rax.uq[12345] : r64.uq[56789] m64.uq[12345] => eflags[0x40,0x40] rax.uq[12345] 0.uq[56789] 1.uq[56789]
cmpxchgq eflags[0x40,0x40] rax.uq[12345] : r64.uq[56789] m64.uq[34567] => eflags[0x40,0x00] rax.uq[34567] 0.uq[56789] 1.uq[34567]
cqo rax.uq[0x0123456789abcdef] : => rdx.uq[0x0000000000000000] rax.uq[0x0123456789abcdef]
cqo rax.uq[0xfedcba9876543210] : => rdx.uq[0xffffffffffffffff] rax.uq[0xfedcba9876543210]
cwd ax.uw[0x1234] : => dx.uw[0x0000] ax.uw[0x1234]
cwd ax.uw[0xfedc] : => dx.uw[0xffff] ax.uw[0xfedc]
cwde ax.sw[12345] : => eax.sd[12345]
cwde ax.sw[-12345] : => eax.sd[-12345]
decb r8.ub[123] => 0.ub[122]
decb m8.ub[123] => 0.ub[122]
decw r16.uw[12345] => 0.uw[12344]
decw m16.uw[12345] => 0.uw[12344]
decl r32.ud[12345678] => 0.ud[12345677]
decl m32.ud[12345678] => 0.ud[12345677]
decq r64.uq[1234567813572468] => 0.uq[1234567813572467]
decq m64.uq[1234567813572468] => 0.uq[1234567813572467]
divb ax.uw[30276] : r8.ub[123] => al.ub[246] ah.ub[18]
divb ax.uw[30276] : m8.ub[123] => al.ub[246] ah.ub[18]
divw dx.uw[464] ax.uw[58794] : r16.uw[12345] => ax.uw[2468] dx.uw[38]
divw dx.uw[464] ax.uw[58794] : m16.uw[12345] => ax.uw[2468] dx.uw[38]
divl edx.ud[251958] eax.ud[673192206] : r32.ud[87654321] => eax.ud[12345678] edx.ud[20783136]
divl edx.ud[251958] eax.ud[673192206] : m32.ud[87654321] => eax.ud[12345678] edx.ud[20783136]
divq rdx.uq[251958251958] rax.uq[673192206673192206] : r64.uq[8765432175318642] => rax.uq[530243038582426] rdx.uq[6769725475870842]
divq rdx.uq[251958251958] rax.uq[673192206673192206] : m64.uq[8765432175318642] => rax.uq[530243038582426] rdx.uq[6769725475870842]
idivb ax.sw[-15157] : r8.sb[123] => al.sb[-123] ah.sb[-28]
idivb ax.sw[15157] : m8.sb[-123] => al.sb[-123] ah.sb[28]
idivw dx.sw[-464] ax.sw[-23456] : r16.sw[12345] => ax.sw[-2459] dx.sw[-10269]
idivw dx.sw[464] ax.sw[23456] : m16.sw[-12345] => ax.sw[-2465] dx.sw[1735]
idivl edx.sd[-251959] eax.sd[-673192206] : r32.sd[87654321] => eax.sd[-12345678] edx.sd[-20783136]
idivl edx.sd[251958] eax.sd[673192206] : m32.sd[-87654321] => eax.sd[-12345678] edx.sd[20783136]
idivq rdx.sq[-251958251959] rax.sq[-673192206673192206] : r64.sq[8765432175318642] => rax.sq[-530243038582426] rdx.sq[-6769725475870842]
idivq rdx.sq[251958251958] rax.sq[673192206673192206] : m64.sq[-8765432175318642] => rax.sq[-530243038582426] rdx.sq[6769725475870842]
imulb al.sb[123] : r8.sb[-123] => ax.sw[-15129]
imulb al.sb[-123] : m8.sb[123] => ax.sw[-15129]
imulw ax.sw[-12345] : r16.sw[12345] => dx.sw[-2326] ax.sw[-27825]
imulw ax.sw[12345] : m16.sw[-12345] => dx.sw[-2326] ax.sw[-27825]
imull eax.sd[-12345678] : r32.sd[12345678] => edx.sd[-35488] eax.sd[-260846532]
imull eax.sd[12345678] : m32.sd[-12345678] => edx.sd[-35488] eax.sd[-260846532]
imulq rax.sq[-1234567812345678] : r64.sq[1234567812345678] => rdx.sq[-82624753572] rax.sq[-2436846251660458948]
imulq rax.sq[1234567812345678] : m64.sq[-1234567812345678] => rdx.sq[-82624753572] rax.sq[-2436846251660458948]
imulw imm8[123] r16.uw[456] => 1.uw[56088]
imulw imm8[123] r16.uw[456] r16.uw[0] => 2.uw[56088]
imulw imm8[123] m16.uw[456] r16.uw[0] => 2.uw[56088]
imulw imm16[123] r16.uw[456] => 1.uw[56088]
imulw imm16[123] r16.uw[456] r16.uw[0] => 2.uw[56088]
imulw imm16[123] m16.uw[456] r16.uw[0] => 2.uw[56088]
imulw r16.uw[123] r16.uw[456] => 1.uw[56088]
imulw m16.uw[123] r16.uw[456] => 1.uw[56088]
imull imm8[123] r32.ud[67890] => 1.ud[8350470]
imull imm8[123] r32.ud[67890] r32.ud[0] => 2.ud[8350470]
imull imm8[123] m32.ud[67890] r32.ud[0] => 2.ud[8350470]
imull imm32[12345] r32.ud[67890] => 1.ud[838102050]
imull imm32[12345] r32.ud[67890] r32.ud[0] => 2.ud[838102050]
imull imm32[12345] m32.ud[67890] r32.ud[0] => 2.ud[838102050]
imull r32.ud[12345] r32.ud[67890] => 1.ud[838102050]
imull m32.ud[12345] r32.ud[67890] => 1.ud[838102050]
imulq imm8[123] r64.uq[1234567890] => 1.uq[151851850470]
imulq imm8[123] r64.uq[1234567890] r64.uq[0] => 2.uq[151851850470]
imulq imm8[123] m64.uq[1234567890] r64.uq[0] => 2.uq[151851850470]
imulq imm32[12345] r64.uq[1234567890] => 1.uq[15240740602050]
imulq imm32[12345] r64.uq[1234567890] r64.uq[0] => 2.uq[15240740602050]
imulq imm32[12345] m64.uq[1234567890] r64.uq[0] => 2.uq[15240740602050]
imulq r64.uq[1234567] r64.uq[1234567890] => 1.uq[1524156776253630]
imulq m64.uq[1234567] r64.uq[1234567890] => 1.uq[1524156776253630]
incb r8.ub[123] => 0.ub[124]
incb m8.ub[123] => 0.ub[124]
incw r16.uw[12345] => 0.uw[12346]
incw m16.uw[12345] => 0.uw[12346]
incl r32.ud[12345678] => 0.ud[12345679]
incl m32.ud[12345678] => 0.ud[12345679]
incq r64.uq[1234567813572468] => 0.uq[1234567813572469]
incq m64.uq[1234567813572468] => 0.uq[1234567813572469]
###lahf eflags[0xff,0xfd] ah.ub[0x28] : => ah.ub[0xd7]
###lahf eflags[0xff,0x28] ah.ub[0xfd] : => ah.ub[0x02]
movb imm8[123] r8.ub[0] => 1.ub[123]
movb imm8[123] m8.ub[0] => 1.ub[123]
movb r8.ub[123] r8.ub[0] => 1.ub[123]
movb r8.ub[123] m8.ub[0] => 1.ub[123]
movb m8.ub[123] r8.ub[0] => 1.ub[123]
movw imm16[12345] r16.uw[0] => 1.uw[12345]
movw imm16[12345] m16.uw[0] => 1.uw[12345]
movw r16.uw[12345] r16.uw[0] => 1.uw[12345]
movw r16.uw[12345] m16.uw[0] => 1.uw[12345]
movw m16.uw[12345] r16.uw[0] => 1.uw[12345]
movl imm32[12345678] r32.ud[0] => 1.ud[12345678]
movl imm32[12345678] m32.ud[0] => 1.ud[12345678]
movl r32.ud[12345678] r32.ud[0] => 1.ud[12345678]
movl r32.ud[12345678] m32.ud[0] => 1.ud[12345678]
movl m32.ud[12345678] r32.ud[0] => 1.ud[12345678]
movq imm32[12345678] r64.uq[0] => 1.uq[12345678]
movq imm32[12345678] m64.uq[0] => 1.uq[12345678]
movq imm64[1234567813572468] r64.uq[0] => 1.uq[1234567813572468]
movq r64.uq[1234567813572468] r64.uq[0] => 1.uq[1234567813572468]
movq r64.uq[1234567813572468] m64.uq[0] => 1.uq[1234567813572468]
movq m64.uq[1234567813572468] r64.uq[0] => 1.uq[1234567813572468]
movsbw r8.sb[123] r16.sw[0] => 1.sw[123]
movsbw m8.sb[-123] r16.sw[0] => 1.sw[-123]
movsbl r8.sb[123] r32.sd[0] => 1.sd[123]
movsbl m8.sb[-123] r32.sd[0] => 1.sd[-123]
movswl r16.sw[12345] r32.sd[0] => 1.sd[12345]
movswl m16.sw[-12345] r32.sd[0] => 1.sd[-12345]
movsbq r8.sb[123] r64.sq[0] => 1.sq[123]
movsbq m8.sb[-123] r64.sq[0] => 1.sq[-123]
movswq r16.sw[12345] r64.sq[0] => 1.sq[12345]
movswq m16.sw[-12345] r64.sq[0] => 1.sq[-12345]
movzbw r8.ub[123] r16.uw[0] => 1.uw[123]
movzbw m8.ub[246] r16.uw[0] => 1.uw[246]
movzbl r8.ub[123] r32.ud[0] => 1.ud[123]
movzbl m8.ub[246] r32.ud[0] => 1.ud[246]
movzwl r16.uw[12345] r32.ud[0] => 1.ud[12345]
movzwl m16.uw[49380] r32.ud[0] => 1.ud[49380]
movzbq r8.ub[123] r64.uq[0] => 1.uq[123]
movzbq m8.ub[246] r64.uq[0] => 1.uq[246]
movzwq r16.uw[12345] r64.uq[0] => 1.uq[12345]
movzwq m16.uw[49380] r64.uq[0] => 1.uq[49380]
mulb al.ub[123] : r8.ub[123] => ax.uw[15129]
mulb al.ub[123] : m8.ub[123] => ax.uw[15129]
mulw ax.uw[12345] : r16.uw[12345] => dx.uw[2325] ax.uw[27825]
mulw ax.uw[12345] : m16.uw[12345] => dx.uw[2325] ax.uw[27825]
mull eax.ud[12345678] : r32.ud[12345678] => edx.ud[35487] eax.ud[260846532]
mull eax.ud[12345678] : m32.ud[12345678] => edx.ud[35487] eax.ud[260846532]
mulq rax.uq[1234567813572468] : r64.uq[1234567813572468] => rdx.uq[82624753735] rax.uq[6281712683416325264]
mulq rax.uq[1234567813572468] : m64.uq[1234567813572468] => rdx.uq[82624753735] rax.uq[6281712683416325264]
negb r8.sb[123] => 0.sb[-123]
negb m8.sb[-123] => 0.sb[123]
negw r16.sw[12345] => 0.sw[-12345]
negw m16.sw[-12345] => 0.sw[12345]
negl r32.sd[12345678] => 0.sd[-12345678]
negl m32.sd[-12345678] => 0.sd[12345678]
negq r64.sq[1234567813572468] => 0.sq[-1234567813572468]
negq m64.sq[-1234567813572468] => 0.sq[1234567813572468]