insn_basic.def

The Valgrind distribution has multiple tools. The most popular is the memory checking tool (called M

cmpw imm16[-50] ax.sw[50] => eflags[0x800,0x000]
cmpw imm16[-100] ax.sw[32700] => eflags[0x800,0x800]
cmpw imm16[3] r16.uw[2] => eflags[0x010,0x010]
cmpw imm16[2] r16.uw[3] => eflags[0x010,0x000]
cmpw imm16[12] r16.uw[12] => eflags[0x044,0x044]
cmpw imm16[12] r16.uw[34] => eflags[0x044,0x000]
cmpw imm16[34] r16.uw[12] => eflags[0x081,0x081]
cmpw imm16[12] r16.uw[34] => eflags[0x081,0x000]
cmpw imm16[100] r16.sw[-32700] => eflags[0x800,0x800]
cmpw imm16[50] r16.sw[-50] => eflags[0x800,0x000]
cmpw imm16[-50] r16.sw[50] => eflags[0x800,0x000]
cmpw imm16[-100] r16.sw[32700] => eflags[0x800,0x800]
cmpw imm16[3] m16.uw[2] => eflags[0x010,0x010]
cmpw imm16[2] m16.uw[3] => eflags[0x010,0x000]
cmpw imm16[12] m16.uw[12] => eflags[0x044,0x044]
cmpw imm16[12] m16.uw[34] => eflags[0x044,0x000]
cmpw imm16[34] m16.uw[12] => eflags[0x081,0x081]
cmpw imm16[12] m16.uw[34] => eflags[0x081,0x000]
cmpw imm16[100] m16.sw[-32700] => eflags[0x800,0x800]
cmpw imm16[50] m16.sw[-50] => eflags[0x800,0x000]
cmpw imm16[-50] m16.sw[50] => eflags[0x800,0x000]
cmpw imm16[-100] m16.sw[32700] => eflags[0x800,0x800]
cmpw r16.uw[3] r16.uw[2] => eflags[0x010,0x010]
cmpw r16.uw[2] r16.uw[3] => eflags[0x010,0x000]
cmpw r16.uw[12] r16.uw[12] => eflags[0x044,0x044]
cmpw r16.uw[12] r16.uw[34] => eflags[0x044,0x000]
cmpw r16.uw[34] r16.uw[12] => eflags[0x081,0x081]
cmpw r16.uw[12] r16.uw[34] => eflags[0x081,0x000]
cmpw r16.uw[100] r16.sw[-32700] => eflags[0x800,0x800]
cmpw r16.uw[50] r16.sw[-50] => eflags[0x800,0x000]
cmpw r16.sw[-50] r16.sw[50] => eflags[0x800,0x000]
cmpw r16.sw[-100] r16.sw[32700] => eflags[0x800,0x800]
cmpw r16.uw[3] m16.uw[2] => eflags[0x010,0x010]
cmpw r16.uw[2] m16.uw[3] => eflags[0x010,0x000]
cmpw r16.uw[12] m16.uw[12] => eflags[0x044,0x044]
cmpw r16.uw[12] m16.uw[34] => eflags[0x044,0x000]
cmpw r16.uw[34] m16.uw[12] => eflags[0x081,0x081]
cmpw r16.uw[12] m16.uw[34] => eflags[0x081,0x000]
cmpw r16.uw[100] m16.sw[-32700] => eflags[0x800,0x800]
cmpw r16.uw[50] m16.sw[-50] => eflags[0x800,0x000]
cmpw r16.sw[-50] m16.sw[50] => eflags[0x800,0x000]
cmpw r16.sw[-100] m16.sw[32700] => eflags[0x800,0x800]
cmpw m16.uw[3] r16.uw[2] => eflags[0x010,0x010]
cmpw m16.uw[2] r16.uw[3] => eflags[0x010,0x000]
cmpw m16.uw[12] r16.uw[12] => eflags[0x044,0x044]
cmpw m16.uw[12] r16.uw[34] => eflags[0x044,0x000]
cmpw m16.uw[34] r16.uw[12] => eflags[0x081,0x081]
cmpw m16.uw[12] r16.uw[34] => eflags[0x081,0x000]
cmpw m16.uw[100] r16.sw[-32700] => eflags[0x800,0x800]
cmpw m16.uw[50] r16.sw[-50] => eflags[0x800,0x000]
cmpw m16.sw[-50] r16.sw[50] => eflags[0x800,0x000]
cmpw m16.sw[-100] r16.sw[32700] => eflags[0x800,0x800]
cmpl imm8[3] r32.ud[2] => eflags[0x010,0x010]
cmpl imm8[2] r32.ud[3] => eflags[0x010,0x000]
cmpl imm8[12] r32.ud[12] => eflags[0x044,0x044]
cmpl imm8[12] r32.ud[34] => eflags[0x044,0x000]
cmpl imm8[34] r32.ud[12] => eflags[0x081,0x081]
cmpl imm8[12] r32.ud[34] => eflags[0x081,0x000]
cmpl imm8[100] r32.sd[-2147483600] => eflags[0x800,0x800]
cmpl imm8[50] r32.sd[-50] => eflags[0x800,0x000]
cmpl imm8[-50] r32.sd[50] => eflags[0x800,0x000]
cmpl imm8[-100] r32.sd[2147483600] => eflags[0x800,0x800]
cmpl imm8[3] m32.ud[2] => eflags[0x010,0x010]
cmpl imm8[2] m32.ud[3] => eflags[0x010,0x000]
cmpl imm8[12] m32.ud[12] => eflags[0x044,0x044]
cmpl imm8[12] m32.ud[34] => eflags[0x044,0x000]
cmpl imm8[34] m32.ud[12] => eflags[0x081,0x081]
cmpl imm8[12] m32.ud[34] => eflags[0x081,0x000]
cmpl imm8[100] m32.sd[-2147483600] => eflags[0x800,0x800]
cmpl imm8[50] m32.sd[-50] => eflags[0x800,0x000]
cmpl imm8[-50] m32.sd[50] => eflags[0x800,0x000]
cmpl imm8[-100] m32.sd[2147483600] => eflags[0x800,0x800]
cmpl imm32[3] eax.ud[2] => eflags[0x010,0x010]
cmpl imm32[2] eax.ud[3] => eflags[0x010,0x000]
cmpl imm32[12] eax.ud[12] => eflags[0x044,0x044]
cmpl imm32[12] eax.ud[34] => eflags[0x044,0x000]
cmpl imm32[34] eax.ud[12] => eflags[0x081,0x081]
cmpl imm32[12] eax.ud[34] => eflags[0x081,0x000]
cmpl imm32[100] eax.sd[-2147483600] => eflags[0x800,0x800]
cmpl imm32[50] eax.sd[-50] => eflags[0x800,0x000]
cmpl imm32[-50] eax.sd[50] => eflags[0x800,0x000]
cmpl imm32[-100] eax.sd[2147483600] => eflags[0x800,0x800]
cmpl imm32[3] r32.ud[2] => eflags[0x010,0x010]
cmpl imm32[2] r32.ud[3] => eflags[0x010,0x000]
cmpl imm32[12] r32.ud[12] => eflags[0x044,0x044]
cmpl imm32[12] r32.ud[34] => eflags[0x044,0x000]
cmpl imm32[34] r32.ud[12] => eflags[0x081,0x081]
cmpl imm32[12] r32.ud[34] => eflags[0x081,0x000]
cmpl imm32[100] r32.sd[-2147483600] => eflags[0x800,0x800]
cmpl imm32[50] r32.sd[-50] => eflags[0x800,0x000]
cmpl imm32[-50] r32.sd[50] => eflags[0x800,0x000]
cmpl imm32[-100] r32.sd[2147483600] => eflags[0x800,0x800]
cmpl imm32[3] m32.ud[2] => eflags[0x010,0x010]
cmpl imm32[2] m32.ud[3] => eflags[0x010,0x000]
cmpl imm32[12] m32.ud[12] => eflags[0x044,0x044]
cmpl imm32[12] m32.ud[34] => eflags[0x044,0x000]
cmpl imm32[34] m32.ud[12] => eflags[0x081,0x081]
cmpl imm32[12] m32.ud[34] => eflags[0x081,0x000]
cmpl imm32[100] m32.sd[-2147483600] => eflags[0x800,0x800]
cmpl imm32[50] m32.sd[-50] => eflags[0x800,0x000]
cmpl imm32[-50] m32.sd[50] => eflags[0x800,0x000]
cmpl imm32[-100] m32.sd[2147483600] => eflags[0x800,0x800]
cmpl r32.ud[3] r32.ud[2] => eflags[0x010,0x010]
cmpl r32.ud[2] r32.ud[3] => eflags[0x010,0x000]
cmpl r32.ud[12] r32.ud[12] => eflags[0x044,0x044]
cmpl r32.ud[12] r32.ud[34] => eflags[0x044,0x000]
cmpl r32.ud[34] r32.ud[12] => eflags[0x081,0x081]
cmpl r32.ud[12] r32.ud[34] => eflags[0x081,0x000]
cmpl r32.ud[100] r32.sd[-2147483600] => eflags[0x800,0x800]
cmpl r32.ud[50] r32.sd[-50] => eflags[0x800,0x000]
cmpl r32.sd[-50] r32.sd[50] => eflags[0x800,0x000]
cmpl r32.sd[-100] r32.sd[2147483600] => eflags[0x800,0x800]
cmpl r32.ud[3] m32.ud[2] => eflags[0x010,0x010]
cmpl r32.ud[2] m32.ud[3] => eflags[0x010,0x000]
cmpl r32.ud[12] m32.ud[12] => eflags[0x044,0x044]
cmpl r32.ud[12] m32.ud[34] => eflags[0x044,0x000]
cmpl r32.ud[34] m32.ud[12] => eflags[0x081,0x081]
cmpl r32.ud[12] m32.ud[34] => eflags[0x081,0x000]
cmpl r32.ud[100] m32.sd[-2147483600] => eflags[0x800,0x800]
cmpl r32.ud[50] m32.sd[-50] => eflags[0x800,0x000]
cmpl r32.sd[-50] m32.sd[50] => eflags[0x800,0x000]
cmpl r32.sd[-100] m32.sd[2147483600] => eflags[0x800,0x800]
cmpl m32.ud[3] r32.ud[2] => eflags[0x010,0x010]
cmpl m32.ud[2] r32.ud[3] => eflags[0x010,0x000]
cmpl m32.ud[12] r32.ud[12] => eflags[0x044,0x044]
cmpl m32.ud[12] r32.ud[34] => eflags[0x044,0x000]
cmpl m32.ud[34] r32.ud[12] => eflags[0x081,0x081]
cmpl m32.ud[12] r32.ud[34] => eflags[0x081,0x000]
cmpl m32.ud[100] r32.sd[-2147483600] => eflags[0x800,0x800]
cmpl m32.ud[50] r32.sd[-50] => eflags[0x800,0x000]
cmpl m32.sd[-50] r32.sd[50] => eflags[0x800,0x000]
cmpl m32.sd[-100] r32.sd[2147483600] => eflags[0x800,0x800]
cmpxchgb eflags[0x40,0x00] ax.uw[12] : r8.ub[56] r8.ub[12] => eflags[0x40,0x40] al.ub[12] 0.ub[56] 1.ub[56]
cmpxchgb eflags[0x40,0x40] al.ub[12] : r8.ub[56] r8.ub[34] => eflags[0x40,0x00] al.ub[34] 0.ub[56] 1.ub[34]
cmpxchgb eflags[0x40,0x00] al.ub[12] : r8.ub[56] m8.ub[12] => eflags[0x40,0x40] al.ub[12] 0.ub[56] 1.ub[56]
cmpxchgb eflags[0x40,0x40] al.ub[12] : r8.ub[56] m8.ub[34] => eflags[0x40,0x00] al.ub[34] 0.ub[56] 1.ub[34]
cmpxchgw eflags[0x40,0x00] ax.uw[123] : r16.uw[567] r16.uw[123] => eflags[0x40,0x40] ax.uw[123] 0.uw[567] 1.uw[567]
cmpxchgw eflags[0x40,0x40] ax.uw[123] : r16.uw[567] r16.uw[345] => eflags[0x40,0x00] ax.uw[345] 0.uw[567] 1.uw[345]
cmpxchgw eflags[0x40,0x00] ax.uw[123] : r16.uw[567] m16.uw[123] => eflags[0x40,0x40] ax.uw[123] 0.uw[567] 1.uw[567]
cmpxchgw eflags[0x40,0x40] ax.uw[123] : r16.uw[567] m16.uw[345] => eflags[0x40,0x00] ax.uw[345] 0.uw[567] 1.uw[345]
cmpxchgl eflags[0x40,0x00] eax.ud[1234] : r32.ud[5678] r32.ud[1234] => eflags[0x40,0x40] eax.ud[1234] 0.ud[5678] 1.ud[5678]
cmpxchgl eflags[0x40,0x40] eax.ud[1234] : r32.ud[5678] r32.ud[3456] => eflags[0x40,0x00] eax.ud[3456] 0.ud[5678] 1.ud[3456]
cmpxchgl eflags[0x40,0x00] eax.ud[1234] : r32.ud[5678] m32.ud[1234] => eflags[0x40,0x40] eax.ud[1234] 0.ud[5678] 1.ud[5678]
cmpxchgl eflags[0x40,0x40] eax.ud[1234] : r32.ud[5678] m32.ud[3456] => eflags[0x40,0x00] eax.ud[3456] 0.ud[5678] 1.ud[3456]
cwd ax.uw[0x1234] : => dx.uw[0x0000] ax.uw[0x1234]
cwd ax.uw[0xfedc] : => dx.uw[0xffff] ax.uw[0xfedc]
cwde ax.sw[12345] : => eax.sd[12345]
cwde ax.sw[-12345] : => eax.sd[-12345]
###daa eflags[0x8d5,0x880] al.ub[0xae] : => al.ub[0x14] eflags[0xd5,0x15]
###daa eflags[0x8d5,0x880] al.ub[0x2e] : => al.ub[0x34] eflags[0xd5,0x10]
###das eflags[0x8d5,0x895] al.ub[0xee] : => al.ub[0x88] eflags[0xd5,0x95]
decb r8.ub[123] => 0.ub[122]
decb m8.ub[123] => 0.ub[122]
decw r16.uw[12345] => 0.uw[12344]
decw m16.uw[12345] => 0.uw[12344]
decl r32.ud[12345678] => 0.ud[12345677]
decl m32.ud[12345678] => 0.ud[12345677]
divb ax.uw[30276] : r8.ub[123] => al.ub[246] ah.ub[18]
divb ax.uw[30276] : m8.ub[123] => al.ub[246] ah.ub[18]
divw dx.uw[464] ax.uw[58794] : r16.uw[12345] => ax.uw[2468] dx.uw[38]
divw dx.uw[464] ax.uw[58794] : m16.uw[12345] => ax.uw[2468] dx.uw[38]
divl edx.ud[251958] eax.ud[673192206] : r32.ud[87654321] => eax.ud[12345678] edx.ud[20783136]
divl edx.ud[251958] eax.ud[673192206] : m32.ud[87654321] => eax.ud[12345678] edx.ud[20783136]
idivb ax.sw[-15157] : r8.sb[123] => al.sb[-123] ah.sb[-28]
idivb ax.sw[15157] : m8.sb[-123] => al.sb[-123] ah.sb[28]
idivw dx.sw[-464] ax.sw[-23456] : r16.sw[12345] => ax.sw[-2459] dx.sw[-10269]
idivw dx.sw[464] ax.sw[23456] : m16.sw[-12345] => ax.sw[-2465] dx.sw[1735]
idivl edx.sd[-251959] eax.sd[-673192206] : r32.sd[87654321] => eax.sd[-12345678] edx.sd[-20783136]
idivl edx.sd[251958] eax.sd[673192206] : m32.sd[-87654321] => eax.sd[-12345678] edx.sd[20783136]
imulb al.sb[123] : r8.sb[-123] => ax.sw[-15129]
imulb al.sb[-123] : m8.sb[123] => ax.sw[-15129]
imulw ax.sw[-12345] : r16.sw[12345] => dx.sw[-2326] ax.sw[-27825]
imulw ax.sw[12345] : m16.sw[-12345] => dx.sw[-2326] ax.sw[-27825]
imull eax.sd[-12345678] : r32.sd[12345678] => edx.sd[-35488] eax.sd[-260846532]
imull eax.sd[12345678] : m32.sd[-12345678] => edx.sd[-35488] eax.sd[-260846532]
imulw imm8[123] r16.uw[456] => 1.uw[56088]
imulw imm8[123] r16.uw[456] r16.uw[0] => 2.uw[56088]
imulw imm8[123] m16.uw[456] r16.uw[0] => 2.uw[56088]
imulw imm16[123] r16.uw[456] => 1.uw[56088]
imulw imm16[123] r16.uw[456] r16.uw[0] => 2.uw[56088]
imulw imm16[123] m16.uw[456] r16.uw[0] => 2.uw[56088]
imulw r16.uw[123] r16.uw[456] => 1.uw[56088]
imulw m16.uw[123] r16.uw[456] => 1.uw[56088]
imull imm8[123] r32.ud[67890] => 1.ud[8350470]
imull imm8[123] r32.ud[67890] r32.ud[0] => 2.ud[8350470]
imull imm8[123] m32.ud[67890] r32.ud[0] => 2.ud[8350470]
imull imm32[12345] r32.ud[67890] => 1.ud[838102050]
imull imm32[12345] r32.ud[67890] r32.ud[0] => 2.ud[838102050]
imull imm32[12345] m32.ud[67890] r32.ud[0] => 2.ud[838102050]
imull r32.ud[12345] r32.ud[67890] => 1.ud[838102050]
imull m32.ud[12345] r32.ud[67890] => 1.ud[838102050]
incb r8.ub[123] => 0.ub[124]
incb m8.ub[123] => 0.ub[124]
incw r16.uw[12345] => 0.uw[12346]
incw m16.uw[12345] => 0.uw[12346]
incl r32.ud[12345678] => 0.ud[12345679]
incl m32.ud[12345678] => 0.ud[12345679]
lahf eflags[0xff,0xfd] ah.ub[0x28] : => ah.ub[0xd7]
lahf eflags[0xff,0x28] ah.ub[0xfd] : => ah.ub[0x02]
movb imm8[123] r8.ub[0] => 1.ub[123]
movb imm8[123] m8.ub[0] => 1.ub[123]
movb r8.ub[123] r8.ub[0] => 1.ub[123]
movb r8.ub[123] m8.ub[0] => 1.ub[123]
movb m8.ub[123] r8.ub[0] => 1.ub[123]
movw imm16[12345] r16.uw[0] => 1.uw[12345]
movw imm16[12345] m16.uw[0] => 1.uw[12345]
movw r16.uw[12345] r16.uw[0] => 1.uw[12345]
movw r16.uw[12345] m16.uw[0] => 1.uw[12345]
movw m16.uw[12345] r16.uw[0] => 1.uw[12345]
movl imm32[12345678] r32.ud[0] => 1.ud[12345678]
movl imm32[12345678] m32.ud[0] => 1.ud[12345678]
movl r32.ud[12345678] r32.ud[0] => 1.ud[12345678]
movl r32.ud[12345678] m32.ud[0] => 1.ud[12345678]
movl m32.ud[12345678] r32.ud[0] => 1.ud[12345678]
movsbw r8.sb[123] r16.sw[0] => 1.sw[123]
movsbw m8.sb[-123] r16.sw[0] => 1.sw[-123]
movsbl r8.sb[123] r32.sd[0] => 1.sd[123]
movsbl m8.sb[-123] r32.sd[0] => 1.sd[-123]
movswl r16.sw[12345] r32.sd[0] => 1.sd[12345]
movswl m16.sw[-12345] r32.sd[0] => 1.sd[-12345]
movzbw r8.ub[123] r16.uw[0] => 1.uw[123]
movzbw m8.ub[246] r16.uw[0] => 1.uw[246]
movzbl r8.ub[123] r32.ud[0] => 1.ud[123]
movzbl m8.ub[246] r32.ud[0] => 1.ud[246]
movzwl r16.uw[12345] r32.ud[0] => 1.ud[12345]
movzwl m16.uw[49380] r32.ud[0] => 1.ud[49380]
mulb al.ub[123] : r8.ub[123] => ax.uw[15129]
mulb al.ub[123] : m8.ub[123] => ax.uw[15129]
mulw ax.uw[12345] : r16.uw[12345] => dx.uw[2325] ax.uw[27825]
mulw ax.uw[12345] : m16.uw[12345] => dx.uw[2325] ax.uw[27825]
mull eax.ud[12345678] : r32.ud[12345678] => edx.ud[35487] eax.ud[260846532]
mull eax.ud[12345678] : m32.ud[12345678] => edx.ud[35487] eax.ud[260846532]
negb r8.sb[123] => 0.sb[-123]
negb m8.sb[-123] => 0.sb[123]
negw r16.sw[12345] => 0.sw[-12345]
negw m16.sw[-12345] => 0.sw[12345]
negl r32.sd[12345678] => 0.sd[-12345678]
negl m32.sd[-12345678] => 0.sd[12345678]
notb r8.ub[0xca] => 0.ub[0x35]
notb m8.ub[0xca] => 0.ub[0x35]
notw r16.uw[0xf0ca] => 0.uw[0x0f35]
notw m16.uw[0xf0ca] => 0.uw[0x0f35]
notl r32.ud[0xff00f0ca] => 0.ud[0x00ff0f35]
notl m32.ud[0xff00f0ca] => 0.ud[0x00ff0f35]
orb imm8[0x34] al.ub[0x56] => 1.ub[0x76]
orb imm8[0x34] bl.ub[0x56] => 1.ub[0x76]
orb imm8[0x34] m8.ub[0x56] => 1.ub[0x76]
orb r8.ub[0x34] r8.ub[0x56] => 1.ub[0x76]
orb r8.ub[0x34] m8.ub[0x56] => 1.ub[0x76]
orb m8.ub[0x34] r8.ub[0x56] => 1.ub[0x76]
orw imm8[0x31] r16.uw[0x1234] => 1.uw[0x1235]
orw imm16[0x4231] ax.uw[0x1234] => 1.uw[0x5235]
orw imm16[0x4231] bx.uw[0x1234] => 1.uw[0x5235]
orw imm16[0x4231] m16.uw[0x1234] => 1.uw[0x5235]
orw r16.uw[0x4231] r16.uw[0x1234] => 1.uw[0x5235]
orw r16.uw[0x4231] m16.uw[0x1234] => 1.uw[0x5235]
orw m16.uw[0x4231] r16.uw[0x1234] => 1.uw[0x5235]
orl imm8[0x31] r32.ud[0x12345678] => 1.ud[0x12345679]
orl imm32[0x86427531] eax.ud[0x12345678] => 1.ud[0x96767779]
orl imm32[0x86427531] ebx.ud[0x12345678] => 1.ud[0x96767779]
orl imm32[0x86427531] m32.ud[0x12345678] => 1.ud[0x96767779]
orl r32.ud[0x86427531] r32.ud[0x12345678] => 1.ud[0x96767779]
orl r32.ud[0x86427531] m32.ud[0x12345678] => 1.ud[0x96767779]
orl m32.ud[0x86427531] r32.ud[0x12345678] => 1.ud[0x96767779]
rclb eflags[0x1,0x0] : r8.ub[0xca] => 0.ub[0x94] eflags[0x1,0x1]
rclb eflags[0x1,0x0] : m8.ub[0xca] => 0.ub[0x94] eflags[0x1,0x1]
rclb eflags[0x1,0x0] : imm8[2] r8.ub[0xca] => 1.ub[0x29] eflags[0x1,0x1]
rclb eflags[0x1,0x0] : imm8[2] m8.ub[0xca] => 1.ub[0x29] eflags[0x1,0x1]
rclb eflags[0x1,0x0] : cl.ub[2] r8.ub[0xca] => 1.ub[0x29] eflags[0x1,0x1]
rclb eflags[0x1,0x0] : cl.ub[2] m8.ub[0xca] => 1.ub[0x29] eflags[0x1,0x1]
rclw eflags[0x1,0x0] : r16.uw[0xf0ca] => 0.uw[0xe194] eflags[0x1,0x1]