📄 hdefs.c
字号:
return; default: vpanic("ppX86RM"); }}/* Because an X86RM can be both a source or destination operand, we have to supply a mode -- pertaining to the operand as a whole -- indicating how it's being used. */static void addRegUsage_X86RM ( HRegUsage* u, X86RM* op, HRegMode mode ) { switch (op->tag) { case Xrm_Mem: /* Memory is read, written or modified. So we just want to know the regs read by the amode. */ addRegUsage_X86AMode(u, op->Xrm.Mem.am); return; case Xrm_Reg: /* reg is read, written or modified. Add it in the appropriate way. */ addHRegUse(u, mode, op->Xrm.Reg.reg); return; default: vpanic("addRegUsage_X86RM"); }}static void mapRegs_X86RM ( HRegRemap* m, X86RM* op ){ switch (op->tag) { case Xrm_Mem: mapRegs_X86AMode(m, op->Xrm.Mem.am); return; case Xrm_Reg: op->Xrm.Reg.reg = lookupHRegRemap(m, op->Xrm.Reg.reg); return; default: vpanic("mapRegs_X86RM"); }}/* --------- Instructions. --------- */HChar* showX86UnaryOp ( X86UnaryOp op ) { switch (op) { case Xun_NOT: return "not"; case Xun_NEG: return "neg"; default: vpanic("showX86UnaryOp"); }}HChar* showX86AluOp ( X86AluOp op ) { switch (op) { case Xalu_MOV: return "mov"; case Xalu_CMP: return "cmp"; case Xalu_ADD: return "add"; case Xalu_SUB: return "sub"; case Xalu_ADC: return "adc"; case Xalu_SBB: return "sbb"; case Xalu_AND: return "and"; case Xalu_OR: return "or"; case Xalu_XOR: return "xor"; case Xalu_MUL: return "mul"; default: vpanic("showX86AluOp"); }}HChar* showX86ShiftOp ( X86ShiftOp op ) { switch (op) { case Xsh_SHL: return "shl"; case Xsh_SHR: return "shr"; case Xsh_SAR: return "sar"; default: vpanic("showX86ShiftOp"); }}HChar* showX86FpOp ( X86FpOp op ) { switch (op) { case Xfp_ADD: return "add"; case Xfp_SUB: return "sub"; case Xfp_MUL: return "mul"; case Xfp_DIV: return "div"; case Xfp_SCALE: return "scale"; case Xfp_ATAN: return "atan"; case Xfp_YL2X: return "yl2x"; case Xfp_YL2XP1: return "yl2xp1"; case Xfp_PREM: return "prem"; case Xfp_PREM1: return "prem1"; case Xfp_SQRT: return "sqrt"; case Xfp_ABS: return "abs"; case Xfp_NEG: return "chs"; case Xfp_MOV: return "mov"; case Xfp_SIN: return "sin"; case Xfp_COS: return "cos"; case Xfp_TAN: return "tan"; case Xfp_ROUND: return "round"; case Xfp_2XM1: return "2xm1"; default: vpanic("showX86FpOp"); }}HChar* showX86SseOp ( X86SseOp op ) { switch (op) { case Xsse_MOV: return "mov(?!)"; case Xsse_ADDF: return "add"; case Xsse_SUBF: return "sub"; case Xsse_MULF: return "mul"; case Xsse_DIVF: return "div"; case Xsse_MAXF: return "max"; case Xsse_MINF: return "min"; case Xsse_CMPEQF: return "cmpFeq"; case Xsse_CMPLTF: return "cmpFlt"; case Xsse_CMPLEF: return "cmpFle"; case Xsse_CMPUNF: return "cmpFun"; case Xsse_RCPF: return "rcp"; case Xsse_RSQRTF: return "rsqrt"; case Xsse_SQRTF: return "sqrt"; case Xsse_AND: return "and"; case Xsse_OR: return "or"; case Xsse_XOR: return "xor"; case Xsse_ANDN: return "andn"; case Xsse_ADD8: return "paddb"; case Xsse_ADD16: return "paddw"; case Xsse_ADD32: return "paddd"; case Xsse_ADD64: return "paddq"; case Xsse_QADD8U: return "paddusb"; case Xsse_QADD16U: return "paddusw"; case Xsse_QADD8S: return "paddsb"; case Xsse_QADD16S: return "paddsw"; case Xsse_SUB8: return "psubb"; case Xsse_SUB16: return "psubw"; case Xsse_SUB32: return "psubd"; case Xsse_SUB64: return "psubq"; case Xsse_QSUB8U: return "psubusb"; case Xsse_QSUB16U: return "psubusw"; case Xsse_QSUB8S: return "psubsb"; case Xsse_QSUB16S: return "psubsw"; case Xsse_MUL16: return "pmullw"; case Xsse_MULHI16U: return "pmulhuw"; case Xsse_MULHI16S: return "pmulhw"; case Xsse_AVG8U: return "pavgb"; case Xsse_AVG16U: return "pavgw"; case Xsse_MAX16S: return "pmaxw"; case Xsse_MAX8U: return "pmaxub"; case Xsse_MIN16S: return "pminw"; case Xsse_MIN8U: return "pminub"; case Xsse_CMPEQ8: return "pcmpeqb"; case Xsse_CMPEQ16: return "pcmpeqw"; case Xsse_CMPEQ32: return "pcmpeqd"; case Xsse_CMPGT8S: return "pcmpgtb"; case Xsse_CMPGT16S: return "pcmpgtw"; case Xsse_CMPGT32S: return "pcmpgtd"; case Xsse_SHL16: return "psllw"; case Xsse_SHL32: return "pslld"; case Xsse_SHL64: return "psllq"; case Xsse_SHR16: return "psrlw"; case Xsse_SHR32: return "psrld"; case Xsse_SHR64: return "psrlq"; case Xsse_SAR16: return "psraw"; case Xsse_SAR32: return "psrad"; case Xsse_PACKSSD: return "packssdw"; case Xsse_PACKSSW: return "packsswb"; case Xsse_PACKUSW: return "packuswb"; case Xsse_UNPCKHB: return "punpckhb"; case Xsse_UNPCKHW: return "punpckhw"; case Xsse_UNPCKHD: return "punpckhd"; case Xsse_UNPCKHQ: return "punpckhq"; case Xsse_UNPCKLB: return "punpcklb"; case Xsse_UNPCKLW: return "punpcklw"; case Xsse_UNPCKLD: return "punpckld"; case Xsse_UNPCKLQ: return "punpcklq"; default: vpanic("showX86SseOp"); }}X86Instr* X86Instr_Alu32R ( X86AluOp op, X86RMI* src, HReg dst ) { X86Instr* i = LibVEX_Alloc(sizeof(X86Instr)); i->tag = Xin_Alu32R; i->Xin.Alu32R.op = op; i->Xin.Alu32R.src = src; i->Xin.Alu32R.dst = dst; return i;}X86Instr* X86Instr_Alu32M ( X86AluOp op, X86RI* src, X86AMode* dst ) { X86Instr* i = LibVEX_Alloc(sizeof(X86Instr)); i->tag = Xin_Alu32M; i->Xin.Alu32M.op = op; i->Xin.Alu32M.src = src; i->Xin.Alu32M.dst = dst; vassert(op != Xalu_MUL); return i;}X86Instr* X86Instr_Sh32 ( X86ShiftOp op, UInt src, HReg dst ) { X86Instr* i = LibVEX_Alloc(sizeof(X86Instr)); i->tag = Xin_Sh32; i->Xin.Sh32.op = op; i->Xin.Sh32.src = src; i->Xin.Sh32.dst = dst; return i;}X86Instr* X86Instr_Test32 ( UInt imm32, HReg dst ) { X86Instr* i = LibVEX_Alloc(sizeof(X86Instr)); i->tag = Xin_Test32; i->Xin.Test32.imm32 = imm32; i->Xin.Test32.dst = dst; return i;}X86Instr* X86Instr_Unary32 ( X86UnaryOp op, HReg dst ) { X86Instr* i = LibVEX_Alloc(sizeof(X86Instr)); i->tag = Xin_Unary32; i->Xin.Unary32.op = op; i->Xin.Unary32.dst = dst; return i;}X86Instr* X86Instr_MulL ( Bool syned, X86RM* src ) { X86Instr* i = LibVEX_Alloc(sizeof(X86Instr)); i->tag = Xin_MulL; i->Xin.MulL.syned = syned; i->Xin.MulL.src = src; return i;}X86Instr* X86Instr_Div ( Bool syned, X86RM* src ) { X86Instr* i = LibVEX_Alloc(sizeof(X86Instr)); i->tag = Xin_Div; i->Xin.Div.syned = syned; i->Xin.Div.src = src; return i;}X86Instr* X86Instr_Sh3232 ( X86ShiftOp op, UInt amt, HReg src, HReg dst ) { X86Instr* i = LibVEX_Alloc(sizeof(X86Instr)); i->tag = Xin_Sh3232; i->Xin.Sh3232.op = op; i->Xin.Sh3232.amt = amt; i->Xin.Sh3232.src = src; i->Xin.Sh3232.dst = dst; vassert(op == Xsh_SHL || op == Xsh_SHR); return i;}X86Instr* X86Instr_Push( X86RMI* src ) { X86Instr* i = LibVEX_Alloc(sizeof(X86Instr)); i->tag = Xin_Push; i->Xin.Push.src = src; return i;}X86Instr* X86Instr_Call ( X86CondCode cond, Addr32 target, Int regparms ) { X86Instr* i = LibVEX_Alloc(sizeof(X86Instr)); i->tag = Xin_Call; i->Xin.Call.cond = cond; i->Xin.Call.target = target; i->Xin.Call.regparms = regparms; vassert(regparms >= 0 && regparms <= 3); return i;}X86Instr* X86Instr_Goto ( IRJumpKind jk, X86CondCode cond, X86RI* dst ) { X86Instr* i = LibVEX_Alloc(sizeof(X86Instr)); i->tag = Xin_Goto; i->Xin.Goto.cond = cond; i->Xin.Goto.dst = dst; i->Xin.Goto.jk = jk; return i;}X86Instr* X86Instr_CMov32 ( X86CondCode cond, X86RM* src, HReg dst ) { X86Instr* i = LibVEX_Alloc(sizeof(X86Instr)); i->tag = Xin_CMov32; i->Xin.CMov32.cond = cond; i->Xin.CMov32.src = src; i->Xin.CMov32.dst = dst; vassert(cond != Xcc_ALWAYS); return i;}X86Instr* X86Instr_LoadEX ( UChar szSmall, Bool syned, X86AMode* src, HReg dst ) { X86Instr* i = LibVEX_Alloc(sizeof(X86Instr)); i->tag = Xin_LoadEX; i->Xin.LoadEX.szSmall = szSmall; i->Xin.LoadEX.syned = syned; i->Xin.LoadEX.src = src; i->Xin.LoadEX.dst = dst; vassert(szSmall == 1 || szSmall == 2); return i;}X86Instr* X86Instr_Store ( UChar sz, HReg src, X86AMode* dst ) { X86Instr* i = LibVEX_Alloc(sizeof(X86Instr)); i->tag = Xin_Store; i->Xin.Store.sz = sz; i->Xin.Store.src = src; i->Xin.Store.dst = dst; vassert(sz == 1 || sz == 2); return i;}X86Instr* X86Instr_Set32 ( X86CondCode cond, HReg dst ) { X86Instr* i = LibVEX_Alloc(sizeof(X86Instr)); i->tag = Xin_Set32; i->Xin.Set32.cond = cond; i->Xin.Set32.dst = dst; return i;}X86Instr* X86Instr_Bsfr32 ( Bool isFwds, HReg src, HReg dst ) { X86Instr* i = LibVEX_Alloc(sizeof(X86Instr)); i->tag = Xin_Bsfr32; i->Xin.Bsfr32.isFwds = isFwds; i->Xin.Bsfr32.src = src; i->Xin.Bsfr32.dst = dst; return i;}X86Instr* X86Instr_MFence ( UInt hwcaps ){ X86Instr* i = LibVEX_Alloc(sizeof(X86Instr)); i->tag = Xin_MFence; i->Xin.MFence.hwcaps = hwcaps; vassert(0 == (hwcaps & ~(VEX_HWCAPS_X86_SSE1|VEX_HWCAPS_X86_SSE2 |VEX_HWCAPS_X86_SSE3))); return i;}X86Instr* X86Instr_FpUnary ( X86FpOp op, HReg src, HReg dst ) { X86Instr* i = LibVEX_Alloc(sizeof(X86Instr)); i->tag = Xin_FpUnary; i->Xin.FpUnary.op = op; i->Xin.FpUnary.src = src; i->Xin.FpUnary.dst = dst; return i;}X86Instr* X86Instr_FpBinary ( X86FpOp op, HReg srcL, HReg srcR, HReg dst ) { X86Instr* i = LibVEX_Alloc(sizeof(X86Instr)); i->tag = Xin_FpBinary; i->Xin.FpBinary.op = op; i->Xin.FpBinary.srcL = srcL; i->Xin.FpBinary.srcR = srcR; i->Xin.FpBinary.dst = dst; return i;}X86Instr* X86Instr_FpLdSt ( Bool isLoad, UChar sz, HReg reg, X86AMode* addr ) { X86Instr* i = LibVEX_Alloc(sizeof(X86Instr)); i->tag = Xin_FpLdSt; i->Xin.FpLdSt.isLoad = isLoad; i->Xin.FpLdSt.sz = sz; i->Xin.FpLdSt.reg = reg; i->Xin.FpLdSt.addr = addr; vassert(sz == 4 || sz == 8); return i;}X86Instr* X86Instr_FpLdStI ( Bool isLoad, UChar sz, HReg reg, X86AMode* addr ) { X86Instr* i = LibVEX_Alloc(sizeof(X86Instr)); i->tag = Xin_FpLdStI; i->Xin.FpLdStI.isLoad = isLoad; i->Xin.FpLdStI.sz = sz; i->Xin.FpLdStI.reg = reg; i->Xin.FpLdStI.addr = addr; vassert(sz == 2 || sz == 4 || sz == 8); return i;}X86Instr* X86Instr_Fp64to32 ( HReg src, HReg dst ) { X86Instr* i = LibVEX_Alloc(sizeof(X86Instr)); i->tag = Xin_Fp64to32; i->Xin.Fp64to32.src = src; i->Xin.Fp64to32.dst = dst; return i;}X86Instr* X86Instr_FpCMov ( X86CondCode cond, HReg src, HReg dst ) { X86Instr* i = LibVEX_Alloc(sizeof(X86Instr)); i->tag = Xin_FpCMov; i->Xin.FpCMov.cond = cond; i->Xin.FpCMov.src = src; i->Xin.FpCMov.dst = dst; vassert(cond != Xcc_ALWAYS); return i;}X86Instr* X86Instr_FpLdCW ( X86AMode* addr ) { X86Instr* i = LibVEX_Alloc(sizeof(X86Instr)); i->tag = Xin_FpLdCW; i->Xin.FpLdCW.addr = addr; return i;}X86Instr* X86Instr_FpStSW_AX ( void ) { X86Instr* i = LibVEX_Alloc(sizeof(X86Instr)); i->tag = Xin_FpStSW_AX; return i;}X86Instr* X86Instr_FpCmp ( HReg srcL, HReg srcR, HReg dst ) { X86Instr* i = LibVEX_Alloc(sizeof(X86Instr)); i->tag = Xin_FpCmp; i->Xin.FpCmp.srcL = srcL; i->Xin.FpCmp.srcR = srcR; i->Xin.FpCmp.dst = dst; return i;}X86Instr* X86Instr_SseConst ( UShort con, HReg dst ) { X86Instr* i = LibVEX_Alloc(sizeof(X86Instr)); i->tag = Xin_SseConst; i->Xin.SseConst.con = con; i->Xin.SseConst.dst = dst; vassert(hregClass(dst) == HRcVec128); return i;}X86Instr* X86Instr_SseLdSt ( Bool isLoad, HReg reg, X86AMode* addr ) { X86Instr* i = LibVEX_Alloc(sizeof(X86Instr)); i->tag = Xin_SseLdSt;
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -