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📄 hdefs.h

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/*---------------------------------------------------------------*//*---                                                         ---*//*--- This file (host-x86/hdefs.h) is                         ---*//*--- Copyright (C) OpenWorks LLP.  All rights reserved.      ---*//*---                                                         ---*//*---------------------------------------------------------------*//*   This file is part of LibVEX, a library for dynamic binary   instrumentation and translation.   Copyright (C) 2004-2006 OpenWorks LLP.  All rights reserved.   This library is made available under a dual licensing scheme.   If you link LibVEX against other code all of which is itself   licensed under the GNU General Public License, version 2 dated June   1991 ("GPL v2"), then you may use LibVEX under the terms of the GPL   v2, as appearing in the file LICENSE.GPL.  If the file LICENSE.GPL   is missing, you can obtain a copy of the GPL v2 from the Free   Software Foundation Inc., 51 Franklin St, Fifth Floor, Boston, MA   02110-1301, USA.   For any other uses of LibVEX, you must first obtain a commercial   license from OpenWorks LLP.  Please contact info@open-works.co.uk   for information about commercial licensing.   This software is provided by OpenWorks LLP "as is" and any express   or implied warranties, including, but not limited to, the implied   warranties of merchantability and fitness for a particular purpose   are disclaimed.  In no event shall OpenWorks LLP be liable for any   direct, indirect, incidental, special, exemplary, or consequential   damages (including, but not limited to, procurement of substitute   goods or services; loss of use, data, or profits; or business   interruption) however caused and on any theory of liability,   whether in contract, strict liability, or tort (including   negligence or otherwise) arising in any way out of the use of this   software, even if advised of the possibility of such damage.   Neither the names of the U.S. Department of Energy nor the   University of California nor the names of its contributors may be   used to endorse or promote products derived from this software   without prior written permission.*/#ifndef __LIBVEX_HOST_X86_HDEFS_H#define __LIBVEX_HOST_X86_HDEFS_H/* --------- Registers. --------- *//* The usual HReg abstraction.  There are 8 real int regs,   6 real float regs, and 8 real vector regs. */extern void ppHRegX86 ( HReg );extern HReg hregX86_EAX ( void );extern HReg hregX86_EBX ( void );extern HReg hregX86_ECX ( void );extern HReg hregX86_EDX ( void );extern HReg hregX86_ESP ( void );extern HReg hregX86_EBP ( void );extern HReg hregX86_ESI ( void );extern HReg hregX86_EDI ( void );extern HReg hregX86_FAKE0 ( void );extern HReg hregX86_FAKE1 ( void );extern HReg hregX86_FAKE2 ( void );extern HReg hregX86_FAKE3 ( void );extern HReg hregX86_FAKE4 ( void );extern HReg hregX86_FAKE5 ( void );extern HReg hregX86_XMM0 ( void );extern HReg hregX86_XMM1 ( void );extern HReg hregX86_XMM2 ( void );extern HReg hregX86_XMM3 ( void );extern HReg hregX86_XMM4 ( void );extern HReg hregX86_XMM5 ( void );extern HReg hregX86_XMM6 ( void );extern HReg hregX86_XMM7 ( void );/* --------- Condition codes, Intel encoding. --------- */typedef   enum {      Xcc_O      = 0,  /* overflow           */      Xcc_NO     = 1,  /* no overflow        */      Xcc_B      = 2,  /* below              */      Xcc_NB     = 3,  /* not below          */      Xcc_Z      = 4,  /* zero               */      Xcc_NZ     = 5,  /* not zero           */      Xcc_BE     = 6,  /* below or equal     */      Xcc_NBE    = 7,  /* not below or equal */      Xcc_S      = 8,  /* negative           */      Xcc_NS     = 9,  /* not negative       */      Xcc_P      = 10, /* parity even        */      Xcc_NP     = 11, /* not parity even    */      Xcc_L      = 12, /* jump less          */      Xcc_NL     = 13, /* not less           */      Xcc_LE     = 14, /* less or equal      */      Xcc_NLE    = 15, /* not less or equal  */      Xcc_ALWAYS = 16  /* the usual hack     */   }   X86CondCode;extern HChar* showX86CondCode ( X86CondCode );/* --------- Memory address expressions (amodes). --------- */typedef   enum {     Xam_IR,        /* Immediate + Reg */     Xam_IRRS       /* Immediate + Reg1 + (Reg2 << Shift) */   }   X86AModeTag;typedef   struct {      X86AModeTag tag;      union {         struct {            UInt imm;            HReg reg;         } IR;         struct {            UInt imm;            HReg base;            HReg index;            Int  shift; /* 0, 1, 2 or 3 only */         } IRRS;      } Xam;   }   X86AMode;extern X86AMode* X86AMode_IR   ( UInt, HReg );extern X86AMode* X86AMode_IRRS ( UInt, HReg, HReg, Int );extern X86AMode* dopyX86AMode ( X86AMode* );extern void ppX86AMode ( X86AMode* );/* --------- Operand, which can be reg, immediate or memory. --------- */typedef    enum {      Xrmi_Imm,      Xrmi_Reg,      Xrmi_Mem   }   X86RMITag;typedef   struct {      X86RMITag tag;      union {         struct {            UInt imm32;         } Imm;         struct {            HReg reg;         } Reg;         struct {            X86AMode* am;         } Mem;      }      Xrmi;   }   X86RMI;extern X86RMI* X86RMI_Imm ( UInt );extern X86RMI* X86RMI_Reg ( HReg );extern X86RMI* X86RMI_Mem ( X86AMode* );extern void ppX86RMI ( X86RMI* );/* --------- Operand, which can be reg or immediate only. --------- */typedef    enum {      Xri_Imm,      Xri_Reg   }   X86RITag;typedef   struct {      X86RITag tag;      union {         struct {            UInt imm32;         } Imm;         struct {            HReg reg;         } Reg;      }      Xri;   }   X86RI;extern X86RI* X86RI_Imm ( UInt );extern X86RI* X86RI_Reg ( HReg );extern void ppX86RI ( X86RI* );/* --------- Operand, which can be reg or memory only. --------- */typedef    enum {      Xrm_Reg,      Xrm_Mem   }   X86RMTag;typedef   struct {      X86RMTag tag;      union {         struct {            HReg reg;         } Reg;         struct {            X86AMode* am;         } Mem;      }      Xrm;   }   X86RM;extern X86RM* X86RM_Reg ( HReg );extern X86RM* X86RM_Mem ( X86AMode* );extern void ppX86RM ( X86RM* );/* --------- Instructions. --------- *//* --------- */typedef   enum {      Xun_NEG,      Xun_NOT   }   X86UnaryOp;extern HChar* showX86UnaryOp ( X86UnaryOp );/* --------- */typedef    enum {      Xalu_INVALID,      Xalu_MOV,      Xalu_CMP,      Xalu_ADD, Xalu_SUB, Xalu_ADC, Xalu_SBB,       Xalu_AND, Xalu_OR, Xalu_XOR,      Xalu_MUL   }   X86AluOp;extern HChar* showX86AluOp ( X86AluOp );/* --------- */typedef   enum {      Xsh_INVALID,      Xsh_SHL, Xsh_SHR, Xsh_SAR   }   X86ShiftOp;extern HChar* showX86ShiftOp ( X86ShiftOp );/* --------- */typedef   enum {      Xfp_INVALID,      /* Binary */      Xfp_ADD, Xfp_SUB, Xfp_MUL, Xfp_DIV,       Xfp_SCALE, Xfp_ATAN, Xfp_YL2X, Xfp_YL2XP1, Xfp_PREM, Xfp_PREM1,      /* Unary */      Xfp_SQRT, Xfp_ABS, Xfp_NEG, Xfp_MOV, Xfp_SIN, Xfp_COS, Xfp_TAN,      Xfp_ROUND, Xfp_2XM1   }   X86FpOp;extern HChar* showX86FpOp ( X86FpOp );/* --------- */typedef   enum {      Xsse_INVALID,      /* mov */      Xsse_MOV,      /* Floating point binary */      Xsse_ADDF, Xsse_SUBF, Xsse_MULF, Xsse_DIVF,      Xsse_MAXF, Xsse_MINF,      Xsse_CMPEQF, Xsse_CMPLTF, Xsse_CMPLEF, Xsse_CMPUNF,      /* Floating point unary */      Xsse_RCPF, Xsse_RSQRTF, Xsse_SQRTF,       /* Bitwise */      Xsse_AND, Xsse_OR, Xsse_XOR, Xsse_ANDN,      /* Integer binary */      Xsse_ADD8,   Xsse_ADD16,   Xsse_ADD32,   Xsse_ADD64,      Xsse_QADD8U, Xsse_QADD16U,      Xsse_QADD8S, Xsse_QADD16S,      Xsse_SUB8,   Xsse_SUB16,   Xsse_SUB32,   Xsse_SUB64,      Xsse_QSUB8U, Xsse_QSUB16U,      Xsse_QSUB8S, Xsse_QSUB16S,      Xsse_MUL16,      Xsse_MULHI16U,      Xsse_MULHI16S,      Xsse_AVG8U, Xsse_AVG16U,      Xsse_MAX16S,      Xsse_MAX8U,      Xsse_MIN16S,      Xsse_MIN8U,      Xsse_CMPEQ8,  Xsse_CMPEQ16,  Xsse_CMPEQ32,      Xsse_CMPGT8S, Xsse_CMPGT16S, Xsse_CMPGT32S,      Xsse_SHL16, Xsse_SHL32, Xsse_SHL64,      Xsse_SHR16, Xsse_SHR32, Xsse_SHR64,      Xsse_SAR16, Xsse_SAR32, 

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