📄 gdefs.h
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/*---------------------------------------------------------------*//*--- ---*//*--- This file (guest-amd64/gdefs.h) is ---*//*--- Copyright (C) OpenWorks LLP. All rights reserved. ---*//*--- ---*//*---------------------------------------------------------------*//* This file is part of LibVEX, a library for dynamic binary instrumentation and translation. Copyright (C) 2004-2006 OpenWorks LLP. All rights reserved. This library is made available under a dual licensing scheme. If you link LibVEX against other code all of which is itself licensed under the GNU General Public License, version 2 dated June 1991 ("GPL v2"), then you may use LibVEX under the terms of the GPL v2, as appearing in the file LICENSE.GPL. If the file LICENSE.GPL is missing, you can obtain a copy of the GPL v2 from the Free Software Foundation Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. For any other uses of LibVEX, you must first obtain a commercial license from OpenWorks LLP. Please contact info@open-works.co.uk for information about commercial licensing. This software is provided by OpenWorks LLP "as is" and any express or implied warranties, including, but not limited to, the implied warranties of merchantability and fitness for a particular purpose are disclaimed. In no event shall OpenWorks LLP be liable for any direct, indirect, incidental, special, exemplary, or consequential damages (including, but not limited to, procurement of substitute goods or services; loss of use, data, or profits; or business interruption) however caused and on any theory of liability, whether in contract, strict liability, or tort (including negligence or otherwise) arising in any way out of the use of this software, even if advised of the possibility of such damage. Neither the names of the U.S. Department of Energy nor the University of California nor the names of its contributors may be used to endorse or promote products derived from this software without prior written permission.*//* Only to be used within the guest-amd64 directory. */#ifndef __LIBVEX_GUEST_AMD64_DEFS_H#define __LIBVEX_GUEST_AMD64_DEFS_H/*---------------------------------------------------------*//*--- amd64 to IR conversion ---*//*---------------------------------------------------------*//* Convert one amd64 insn to IR. See the type DisOneInstrFn in bb_to_IR.h. */externDisResult disInstr_AMD64 ( IRBB* irbb, Bool put_IP, Bool (*resteerOkFn) ( void*, Addr64 ), void* callback_opaque, UChar* guest_code, Long delta, Addr64 guest_IP, VexArch guest_arch, VexArchInfo* archinfo, Bool host_bigendian );/* Used by the optimiser to specialise calls to helpers. */externIRExpr* guest_amd64_spechelper ( HChar* function_name, IRExpr** args );/* Describes to the optimiser which part of the guest state require precise memory exceptions. This is logically part of the guest state description. */extern Bool guest_amd64_state_requires_precise_mem_exns ( Int, Int );externVexGuestLayout amd64guest_layout;/*---------------------------------------------------------*//*--- amd64 guest helpers ---*//*---------------------------------------------------------*//* --- CLEAN HELPERS --- */extern ULong amd64g_calculate_rflags_all ( ULong cc_op, ULong cc_dep1, ULong cc_dep2, ULong cc_ndep );extern ULong amd64g_calculate_rflags_c ( ULong cc_op, ULong cc_dep1, ULong cc_dep2, ULong cc_ndep );extern ULong amd64g_calculate_condition ( ULong/*AMD64Condcode*/ cond, ULong cc_op, ULong cc_dep1, ULong cc_dep2, ULong cc_ndep );extern ULong amd64g_calculate_FXAM ( ULong tag, ULong dbl );extern ULong amd64g_calculate_RCR ( ULong arg, ULong rot_amt, ULong rflags_in, Long sz );extern ULong amd64g_check_fldcw ( ULong fpucw );extern ULong amd64g_create_fpucw ( ULong fpround );extern ULong amd64g_check_ldmxcsr ( ULong mxcsr );extern ULong amd64g_create_mxcsr ( ULong sseround );extern VexEmWarn amd64g_dirtyhelper_FLDENV ( VexGuestAMD64State*, HWord );extern void amd64g_dirtyhelper_FSTENV ( VexGuestAMD64State*, HWord );/* Translate a guest virtual_addr into a guest linear address by consulting the supplied LDT/GDT structures. Their representation must be as specified in pub/libvex_guest_amd64.h. To indicate a translation failure, 1<<32 is returned. On success, the lower 32 bits of the returned result indicate the linear address. *///extern //ULong amd64g_use_seg_selector ( HWord ldt, HWord gdt, // UInt seg_selector, UInt virtual_addr );extern ULong amd64g_calculate_mmx_pmaddwd ( ULong, ULong );extern ULong amd64g_calculate_mmx_psadbw ( ULong, ULong );extern ULong amd64g_calculate_mmx_pmovmskb ( ULong );extern ULong amd64g_calculate_sse_pmovmskb ( ULong w64hi, ULong w64lo );/* --- DIRTY HELPERS --- */extern ULong amd64g_dirtyhelper_loadF80le ( ULong/*addr*/ );extern void amd64g_dirtyhelper_storeF80le ( ULong/*addr*/, ULong/*data*/ );extern void amd64g_dirtyhelper_CPUID ( VexGuestAMD64State* st );extern void amd64g_dirtyhelper_FINIT ( VexGuestAMD64State* );extern ULong amd64g_dirtyhelper_RDTSC ( void );//extern void amd64g_dirtyhelper_CPUID_sse0 ( VexGuestAMD64State* );//extern void amd64g_dirtyhelper_CPUID_sse1 ( VexGuestAMD64State* );//extern void amd64g_dirtyhelper_CPUID_sse2 ( VexGuestAMD64State* );//extern void amd64g_dirtyhelper_FSAVE ( VexGuestAMD64State*, HWord );//extern VexEmWarn// amd64g_dirtyhelper_FRSTOR ( VexGuestAMD64State*, HWord );//extern void amd64g_dirtyhelper_FSTENV ( VexGuestAMD64State*, HWord );//extern VexEmWarn // amd64g_dirtyhelper_FLDENV ( VexGuestAMD64State*, HWord );//extern void amd64g_dirtyhelper_FXSAVE ( VexGuestAMD64State*, HWord );/*---------------------------------------------------------*//*--- Condition code stuff ---*//*---------------------------------------------------------*//* rflags masks */#define AMD64G_CC_SHIFT_O 11#define AMD64G_CC_SHIFT_S 7#define AMD64G_CC_SHIFT_Z 6#define AMD64G_CC_SHIFT_A 4#define AMD64G_CC_SHIFT_C 0#define AMD64G_CC_SHIFT_P 2#define AMD64G_CC_MASK_O (1ULL << AMD64G_CC_SHIFT_O)#define AMD64G_CC_MASK_S (1ULL << AMD64G_CC_SHIFT_S)#define AMD64G_CC_MASK_Z (1ULL << AMD64G_CC_SHIFT_Z)#define AMD64G_CC_MASK_A (1ULL << AMD64G_CC_SHIFT_A)#define AMD64G_CC_MASK_C (1ULL << AMD64G_CC_SHIFT_C)#define AMD64G_CC_MASK_P (1ULL << AMD64G_CC_SHIFT_P)/* FPU flag masks */#define AMD64G_FC_SHIFT_C3 14#define AMD64G_FC_SHIFT_C2 10#define AMD64G_FC_SHIFT_C1 9#define AMD64G_FC_SHIFT_C0 8#define AMD64G_FC_MASK_C3 (1ULL << AMD64G_FC_SHIFT_C3)#define AMD64G_FC_MASK_C2 (1ULL << AMD64G_FC_SHIFT_C2)#define AMD64G_FC_MASK_C1 (1ULL << AMD64G_FC_SHIFT_C1)#define AMD64G_FC_MASK_C0 (1ULL << AMD64G_FC_SHIFT_C0)/* %RFLAGS thunk descriptors. A four-word thunk is used to record details of the most recent flag-setting operation, so the flags can be computed later if needed. It is possible to do this a little more efficiently using a 3-word thunk, but that makes it impossible to describe the flag data dependencies sufficiently accurately for Memcheck. Hence 4 words are used, with minimal loss of efficiency. The four words are: CC_OP, which describes the operation. CC_DEP1 and CC_DEP2. These are arguments to the operation.
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