📄 hdefs.h
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/*---------------------------------------------------------------*//*--- ---*//*--- This file (host-ppc/hdefs.h) is ---*//*--- Copyright (C) OpenWorks LLP. All rights reserved. ---*//*--- ---*//*---------------------------------------------------------------*//* This file is part of LibVEX, a library for dynamic binary instrumentation and translation. Copyright (C) 2004-2006 OpenWorks LLP. All rights reserved. This library is made available under a dual licensing scheme. If you link LibVEX against other code all of which is itself licensed under the GNU General Public License, version 2 dated June 1991 ("GPL v2"), then you may use LibVEX under the terms of the GPL v2, as appearing in the file LICENSE.GPL. If the file LICENSE.GPL is missing, you can obtain a copy of the GPL v2 from the Free Software Foundation Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. For any other uses of LibVEX, you must first obtain a commercial license from OpenWorks LLP. Please contact info@open-works.co.uk for information about commercial licensing. This software is provided by OpenWorks LLP "as is" and any express or implied warranties, including, but not limited to, the implied warranties of merchantability and fitness for a particular purpose are disclaimed. In no event shall OpenWorks LLP be liable for any direct, indirect, incidental, special, exemplary, or consequential damages (including, but not limited to, procurement of substitute goods or services; loss of use, data, or profits; or business interruption) however caused and on any theory of liability, whether in contract, strict liability, or tort (including negligence or otherwise) arising in any way out of the use of this software, even if advised of the possibility of such damage. Neither the names of the U.S. Department of Energy nor the University of California nor the names of its contributors may be used to endorse or promote products derived from this software without prior written permission.*/#ifndef __LIBVEX_HOST_PPC_HDEFS_H#define __LIBVEX_HOST_PPC_HDEFS_H/* Num registers used for function calls */#define PPC_N_REGPARMS 8/* --------- Registers. --------- *//* The usual HReg abstraction. There are 32 real int regs, 32 real float regs, and 32 real vector regs. */extern void ppHRegPPC ( HReg );extern HReg hregPPC_GPR0 ( Bool mode64 ); // scratch reg / zero regextern HReg hregPPC_GPR1 ( Bool mode64 ); // Stack Frame Pointerextern HReg hregPPC_GPR2 ( Bool mode64 ); // not used: TOC pointerextern HReg hregPPC_GPR3 ( Bool mode64 );extern HReg hregPPC_GPR4 ( Bool mode64 );extern HReg hregPPC_GPR5 ( Bool mode64 );extern HReg hregPPC_GPR6 ( Bool mode64 );extern HReg hregPPC_GPR7 ( Bool mode64 );extern HReg hregPPC_GPR8 ( Bool mode64 );extern HReg hregPPC_GPR9 ( Bool mode64 );extern HReg hregPPC_GPR10 ( Bool mode64 );extern HReg hregPPC_GPR11 ( Bool mode64 );extern HReg hregPPC_GPR12 ( Bool mode64 );extern HReg hregPPC_GPR13 ( Bool mode64 );extern HReg hregPPC_GPR14 ( Bool mode64 );extern HReg hregPPC_GPR15 ( Bool mode64 );extern HReg hregPPC_GPR16 ( Bool mode64 );extern HReg hregPPC_GPR17 ( Bool mode64 );extern HReg hregPPC_GPR18 ( Bool mode64 );extern HReg hregPPC_GPR19 ( Bool mode64 );extern HReg hregPPC_GPR20 ( Bool mode64 );extern HReg hregPPC_GPR21 ( Bool mode64 );extern HReg hregPPC_GPR22 ( Bool mode64 );extern HReg hregPPC_GPR23 ( Bool mode64 );extern HReg hregPPC_GPR24 ( Bool mode64 );extern HReg hregPPC_GPR25 ( Bool mode64 );extern HReg hregPPC_GPR26 ( Bool mode64 );extern HReg hregPPC_GPR27 ( Bool mode64 );extern HReg hregPPC_GPR28 ( Bool mode64 );extern HReg hregPPC_GPR29 ( Bool mode64 ); // reserved for dispatcherextern HReg hregPPC_GPR30 ( Bool mode64 ); // used as VMX spill tempextern HReg hregPPC_GPR31 ( Bool mode64 ); // GuestStatePtr (callee-saved)extern HReg hregPPC_FPR0 ( void );extern HReg hregPPC_FPR1 ( void );extern HReg hregPPC_FPR2 ( void );extern HReg hregPPC_FPR3 ( void );extern HReg hregPPC_FPR4 ( void );extern HReg hregPPC_FPR5 ( void );extern HReg hregPPC_FPR6 ( void );extern HReg hregPPC_FPR7 ( void );extern HReg hregPPC_FPR8 ( void );extern HReg hregPPC_FPR9 ( void );extern HReg hregPPC_FPR10 ( void );extern HReg hregPPC_FPR11 ( void );extern HReg hregPPC_FPR12 ( void );extern HReg hregPPC_FPR13 ( void );extern HReg hregPPC_FPR14 ( void );extern HReg hregPPC_FPR15 ( void );extern HReg hregPPC_FPR16 ( void );extern HReg hregPPC_FPR17 ( void );extern HReg hregPPC_FPR18 ( void );extern HReg hregPPC_FPR19 ( void );extern HReg hregPPC_FPR20 ( void );extern HReg hregPPC_FPR21 ( void );extern HReg hregPPC_FPR22 ( void );extern HReg hregPPC_FPR23 ( void );extern HReg hregPPC_FPR24 ( void );extern HReg hregPPC_FPR25 ( void );extern HReg hregPPC_FPR26 ( void );extern HReg hregPPC_FPR27 ( void );extern HReg hregPPC_FPR28 ( void );extern HReg hregPPC_FPR29 ( void );extern HReg hregPPC_FPR30 ( void );extern HReg hregPPC_FPR31 ( void );extern HReg hregPPC_VR0 ( void );extern HReg hregPPC_VR1 ( void );extern HReg hregPPC_VR2 ( void );extern HReg hregPPC_VR3 ( void );extern HReg hregPPC_VR4 ( void );extern HReg hregPPC_VR5 ( void );extern HReg hregPPC_VR6 ( void );extern HReg hregPPC_VR7 ( void );extern HReg hregPPC_VR8 ( void );extern HReg hregPPC_VR9 ( void );extern HReg hregPPC_VR10 ( void );extern HReg hregPPC_VR11 ( void );extern HReg hregPPC_VR12 ( void );extern HReg hregPPC_VR13 ( void );extern HReg hregPPC_VR14 ( void );extern HReg hregPPC_VR15 ( void );extern HReg hregPPC_VR16 ( void );extern HReg hregPPC_VR17 ( void );extern HReg hregPPC_VR18 ( void );extern HReg hregPPC_VR19 ( void );extern HReg hregPPC_VR20 ( void );extern HReg hregPPC_VR21 ( void );extern HReg hregPPC_VR22 ( void );extern HReg hregPPC_VR23 ( void );extern HReg hregPPC_VR24 ( void );extern HReg hregPPC_VR25 ( void );extern HReg hregPPC_VR26 ( void );extern HReg hregPPC_VR27 ( void );extern HReg hregPPC_VR28 ( void );extern HReg hregPPC_VR29 ( void );extern HReg hregPPC_VR30 ( void );extern HReg hregPPC_VR31 ( void );#define StackFramePtr(_mode64) hregPPC_GPR1(_mode64)#define GuestStatePtr(_mode64) hregPPC_GPR31(_mode64)/* --------- Condition codes --------- *//* This gives names from bitfields in CR; hence it names BI numbers *//* Using IBM/hardware indexing convention */typedef enum { // CR7, which we use for integer compares Pcf_7LT = 28, /* neg | lt */ Pcf_7GT = 29, /* pos | gt */ Pcf_7EQ = 30, /* zero | equal */ Pcf_7SO = 31 /* summary overflow */ } PPCCondFlag;typedef enum { /* Maps bc bitfield BO */ Pct_FALSE = 0x4, Pct_TRUE = 0xC, Pct_ALWAYS = 0x14 } PPCCondTest;typedef struct { PPCCondFlag flag; PPCCondTest test; } PPCCondCode;extern HChar* showPPCCondCode ( PPCCondCode );/* constructor */extern PPCCondCode mk_PPCCondCode ( PPCCondTest, PPCCondFlag );/* false->true, true->false */extern PPCCondTest invertCondTest ( PPCCondTest );/* --------- Memory address expressions (amodes). --------- */typedef enum { Pam_IR=1, /* Immediate (signed 16-bit) + Reg */ Pam_RR=2 /* Reg1 + Reg2 */ } PPCAModeTag;typedef struct { PPCAModeTag tag; union { struct { HReg base; Int index; } IR; struct { HReg base; HReg index; } RR; } Pam; } PPCAMode;extern PPCAMode* PPCAMode_IR ( Int, HReg );extern PPCAMode* PPCAMode_RR ( HReg, HReg );extern PPCAMode* dopyPPCAMode ( PPCAMode* );extern void ppPPCAMode ( PPCAMode* );/* --------- Operand, which can be a reg or a u16/s16. --------- *//* ("RH" == "Register or Halfword immediate") */typedef enum { Prh_Imm=3, Prh_Reg=4 } PPCRHTag;typedef struct { PPCRHTag tag; union { struct { Bool syned; UShort imm16; } Imm; struct { HReg reg; } Reg; } Prh; } PPCRH;extern PPCRH* PPCRH_Imm ( Bool, UShort );extern PPCRH* PPCRH_Reg ( HReg );extern void ppPPCRH ( PPCRH* );/* --------- Operand, which can be a reg or a u32/64. --------- */typedef enum { Pri_Imm=5, Pri_Reg=6 } PPCRITag;typedef struct { PPCRITag tag; union { ULong Imm; HReg Reg; } Pri; } PPCRI;extern PPCRI* PPCRI_Imm ( ULong );extern PPCRI* PPCRI_Reg ( HReg );extern void ppPPCRI ( PPCRI* );/* --------- Operand, which can be a vector reg or a s6. --------- *//* ("VI" == "Vector Register or Immediate") */typedef enum { Pvi_Imm=7, Pvi_Reg=8 } PPCVI5sTag;typedef struct { PPCVI5sTag tag; union { Char Imm5s; HReg Reg; } Pvi; } PPCVI5s;extern PPCVI5s* PPCVI5s_Imm ( Char );extern PPCVI5s* PPCVI5s_Reg ( HReg );extern void ppPPCVI5s ( PPCVI5s* );/* --------- Instructions. --------- *//* --------- */typedef enum { Pun_NEG, Pun_NOT, Pun_CLZ32, Pun_CLZ64, Pun_EXTSW } PPCUnaryOp;extern HChar* showPPCUnaryOp ( PPCUnaryOp );/* --------- */typedef enum { Palu_INVALID, Palu_ADD, Palu_SUB, Palu_AND, Palu_OR, Palu_XOR, } PPCAluOp;extern HChar* showPPCAluOp ( PPCAluOp, Bool /* is the 2nd operand an immediate? */);/* --------- */typedef enum { Pshft_INVALID, Pshft_SHL, Pshft_SHR, Pshft_SAR, } PPCShftOp;extern HChar* showPPCShftOp ( PPCShftOp, Bool /* is the 2nd operand an immediate? */, Bool /* is this a 32bit or 64bit op? */ );/* --------- */typedef enum { Pfp_INVALID, /* Ternary */ Pfp_MADDD, Pfp_MSUBD, Pfp_MADDS, Pfp_MSUBS, /* Binary */ Pfp_ADDD, Pfp_SUBD, Pfp_MULD, Pfp_DIVD, Pfp_ADDS, Pfp_SUBS, Pfp_MULS, Pfp_DIVS, /* Unary */ Pfp_SQRT, Pfp_ABS, Pfp_NEG, Pfp_MOV, Pfp_RES, Pfp_RSQRTE } PPCFpOp;extern HChar* showPPCFpOp ( PPCFpOp );/* --------- */typedef enum { Pav_INVALID, /* Integer Unary */ Pav_MOV, /* Mov */ Pav_NOT, /* Bitwise */ Pav_UNPCKH8S, Pav_UNPCKH16S, /* Unpack */ Pav_UNPCKL8S, Pav_UNPCKL16S, Pav_UNPCKHPIX, Pav_UNPCKLPIX, /* Integer Binary */ Pav_AND, Pav_OR, Pav_XOR, /* Bitwise */ Pav_ADDU, Pav_QADDU, Pav_QADDS, Pav_SUBU, Pav_QSUBU, Pav_QSUBS, Pav_OMULU, Pav_OMULS, Pav_EMULU, Pav_EMULS, Pav_AVGU, Pav_AVGS, Pav_MAXU, Pav_MAXS, Pav_MINU, Pav_MINS, /* Compare (always affects CR field 6) */ Pav_CMPEQU, Pav_CMPGTU, Pav_CMPGTS, /* Shift */ Pav_SHL, Pav_SHR, Pav_SAR, Pav_ROTL, /* Pack */ Pav_PACKUU, Pav_QPACKUU, Pav_QPACKSU, Pav_QPACKSS, Pav_PACKPXL, /* Merge */ Pav_MRGHI, Pav_MRGLO, } PPCAvOp;extern HChar* showPPCAvOp ( PPCAvOp );
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