ghelpers.c

The Valgrind distribution has multiple tools. The most popular is the memory checking tool (called M

   VECZERO(vex_state->guest_VR4 );
   VECZERO(vex_state->guest_VR5 );
   VECZERO(vex_state->guest_VR6 );
   VECZERO(vex_state->guest_VR7 );
   VECZERO(vex_state->guest_VR8 );
   VECZERO(vex_state->guest_VR9 );
   VECZERO(vex_state->guest_VR10);
   VECZERO(vex_state->guest_VR11);
   VECZERO(vex_state->guest_VR12);
   VECZERO(vex_state->guest_VR13);
   VECZERO(vex_state->guest_VR14);
   VECZERO(vex_state->guest_VR15);
   VECZERO(vex_state->guest_VR16);
   VECZERO(vex_state->guest_VR17);
   VECZERO(vex_state->guest_VR18);
   VECZERO(vex_state->guest_VR19);
   VECZERO(vex_state->guest_VR20);
   VECZERO(vex_state->guest_VR21);
   VECZERO(vex_state->guest_VR22);
   VECZERO(vex_state->guest_VR23);
   VECZERO(vex_state->guest_VR24);
   VECZERO(vex_state->guest_VR25);
   VECZERO(vex_state->guest_VR26);
   VECZERO(vex_state->guest_VR27);
   VECZERO(vex_state->guest_VR28);
   VECZERO(vex_state->guest_VR29);
   VECZERO(vex_state->guest_VR30);
   VECZERO(vex_state->guest_VR31);

#  undef VECZERO

   vex_state->guest_CIA  = 0;
   vex_state->guest_LR   = 0;
   vex_state->guest_CTR  = 0;

   vex_state->guest_XER_SO = 0;
   vex_state->guest_XER_OV = 0;
   vex_state->guest_XER_CA = 0;
   vex_state->guest_XER_BC = 0;

   vex_state->guest_CR0_321 = 0;
   vex_state->guest_CR0_0   = 0;
   vex_state->guest_CR1_321 = 0;
   vex_state->guest_CR1_0   = 0;
   vex_state->guest_CR2_321 = 0;
   vex_state->guest_CR2_0   = 0;
   vex_state->guest_CR3_321 = 0;
   vex_state->guest_CR3_0   = 0;
   vex_state->guest_CR4_321 = 0;
   vex_state->guest_CR4_0   = 0;
   vex_state->guest_CR5_321 = 0;
   vex_state->guest_CR5_0   = 0;
   vex_state->guest_CR6_321 = 0;
   vex_state->guest_CR6_0   = 0;
   vex_state->guest_CR7_321 = 0;
   vex_state->guest_CR7_0   = 0;

   vex_state->guest_FPROUND = (UInt)PPCrm_NEAREST;

   vex_state->guest_VRSAVE = 0;

   vex_state->guest_VSCR = 0x0;  // Non-Java mode = 0

   vex_state->guest_EMWARN = EmWarn_NONE;

   vex_state->guest_RESVN   = 0;

   vex_state->guest_TISTART = 0;
   vex_state->guest_TILEN   = 0;

   vex_state->guest_NRADDR = 0;
}


/* VISIBLE TO LIBVEX CLIENT */
void LibVEX_GuestPPC64_initialise ( /*OUT*/VexGuestPPC64State* vex_state )
{
   Int i;
   vex_state->guest_GPR0  = 0;
   vex_state->guest_GPR1  = 0;
   vex_state->guest_GPR2  = 0;
   vex_state->guest_GPR3  = 0;
   vex_state->guest_GPR4  = 0;
   vex_state->guest_GPR5  = 0;
   vex_state->guest_GPR6  = 0;
   vex_state->guest_GPR7  = 0;
   vex_state->guest_GPR8  = 0;
   vex_state->guest_GPR9  = 0;
   vex_state->guest_GPR10 = 0;
   vex_state->guest_GPR11 = 0;
   vex_state->guest_GPR12 = 0;
   vex_state->guest_GPR13 = 0;
   vex_state->guest_GPR14 = 0;
   vex_state->guest_GPR15 = 0;
   vex_state->guest_GPR16 = 0;
   vex_state->guest_GPR17 = 0;
   vex_state->guest_GPR18 = 0;
   vex_state->guest_GPR19 = 0;
   vex_state->guest_GPR20 = 0;
   vex_state->guest_GPR21 = 0;
   vex_state->guest_GPR22 = 0;
   vex_state->guest_GPR23 = 0;
   vex_state->guest_GPR24 = 0;
   vex_state->guest_GPR25 = 0;
   vex_state->guest_GPR26 = 0;
   vex_state->guest_GPR27 = 0;
   vex_state->guest_GPR28 = 0;
   vex_state->guest_GPR29 = 0;
   vex_state->guest_GPR30 = 0;
   vex_state->guest_GPR31 = 0;

   vex_state->guest_FPR0  = 0;
   vex_state->guest_FPR1  = 0;
   vex_state->guest_FPR2  = 0;
   vex_state->guest_FPR3  = 0;
   vex_state->guest_FPR4  = 0;
   vex_state->guest_FPR5  = 0;
   vex_state->guest_FPR6  = 0;
   vex_state->guest_FPR7  = 0;
   vex_state->guest_FPR8  = 0;
   vex_state->guest_FPR9  = 0;
   vex_state->guest_FPR10 = 0;
   vex_state->guest_FPR11 = 0;
   vex_state->guest_FPR12 = 0;
   vex_state->guest_FPR13 = 0;
   vex_state->guest_FPR14 = 0;
   vex_state->guest_FPR15 = 0;
   vex_state->guest_FPR16 = 0;
   vex_state->guest_FPR17 = 0;
   vex_state->guest_FPR18 = 0;
   vex_state->guest_FPR19 = 0;
   vex_state->guest_FPR20 = 0;
   vex_state->guest_FPR21 = 0;
   vex_state->guest_FPR22 = 0;
   vex_state->guest_FPR23 = 0;
   vex_state->guest_FPR24 = 0;
   vex_state->guest_FPR25 = 0;
   vex_state->guest_FPR26 = 0;
   vex_state->guest_FPR27 = 0;
   vex_state->guest_FPR28 = 0;
   vex_state->guest_FPR29 = 0;
   vex_state->guest_FPR30 = 0;
   vex_state->guest_FPR31 = 0;

   /* Initialise the vector state. */
#  define VECZERO(_vr) _vr[0]=_vr[1]=_vr[2]=_vr[3] = 0;

   VECZERO(vex_state->guest_VR0 );
   VECZERO(vex_state->guest_VR1 );
   VECZERO(vex_state->guest_VR2 );
   VECZERO(vex_state->guest_VR3 );
   VECZERO(vex_state->guest_VR4 );
   VECZERO(vex_state->guest_VR5 );
   VECZERO(vex_state->guest_VR6 );
   VECZERO(vex_state->guest_VR7 );
   VECZERO(vex_state->guest_VR8 );
   VECZERO(vex_state->guest_VR9 );
   VECZERO(vex_state->guest_VR10);
   VECZERO(vex_state->guest_VR11);
   VECZERO(vex_state->guest_VR12);
   VECZERO(vex_state->guest_VR13);
   VECZERO(vex_state->guest_VR14);
   VECZERO(vex_state->guest_VR15);
   VECZERO(vex_state->guest_VR16);
   VECZERO(vex_state->guest_VR17);
   VECZERO(vex_state->guest_VR18);
   VECZERO(vex_state->guest_VR19);
   VECZERO(vex_state->guest_VR20);
   VECZERO(vex_state->guest_VR21);
   VECZERO(vex_state->guest_VR22);
   VECZERO(vex_state->guest_VR23);
   VECZERO(vex_state->guest_VR24);
   VECZERO(vex_state->guest_VR25);
   VECZERO(vex_state->guest_VR26);
   VECZERO(vex_state->guest_VR27);
   VECZERO(vex_state->guest_VR28);
   VECZERO(vex_state->guest_VR29);
   VECZERO(vex_state->guest_VR30);
   VECZERO(vex_state->guest_VR31);

#  undef VECZERO

   vex_state->guest_CIA  = 0;
   vex_state->guest_LR   = 0;
   vex_state->guest_CTR  = 0;

   vex_state->guest_XER_SO = 0;
   vex_state->guest_XER_OV = 0;
   vex_state->guest_XER_CA = 0;
   vex_state->guest_XER_BC = 0;

   vex_state->guest_CR0_321 = 0;
   vex_state->guest_CR0_0   = 0;
   vex_state->guest_CR1_321 = 0;
   vex_state->guest_CR1_0   = 0;
   vex_state->guest_CR2_321 = 0;
   vex_state->guest_CR2_0   = 0;
   vex_state->guest_CR3_321 = 0;
   vex_state->guest_CR3_0   = 0;
   vex_state->guest_CR4_321 = 0;
   vex_state->guest_CR4_0   = 0;
   vex_state->guest_CR5_321 = 0;
   vex_state->guest_CR5_0   = 0;
   vex_state->guest_CR6_321 = 0;
   vex_state->guest_CR6_0   = 0;
   vex_state->guest_CR7_321 = 0;
   vex_state->guest_CR7_0   = 0;

   vex_state->guest_FPROUND = (UInt)PPCrm_NEAREST;

   vex_state->guest_VRSAVE = 0;

   vex_state->guest_VSCR = 0x0;  // Non-Java mode = 0

   vex_state->guest_EMWARN = EmWarn_NONE;

   vex_state->guest_RESVN   = 0;

   vex_state->guest_TISTART = 0;
   vex_state->guest_TILEN   = 0;

   vex_state->guest_NRADDR = 0;
   vex_state->guest_NRADDR_GPR2 = 0;

   vex_state->guest_REDIR_SP = -1;
   for (i = 0; i < VEX_GUEST_PPC64_REDIR_STACK_SIZE; i++)
      vex_state->guest_REDIR_STACK[i] = 0;
}


/*-----------------------------------------------------------*/
/*--- Describing the ppc guest state, for the benefit     ---*/
/*--- of iropt and instrumenters.                         ---*/
/*-----------------------------------------------------------*/

/* Figure out if any part of the guest state contained in minoff
   .. maxoff requires precise memory exceptions.  If in doubt return
   True (but this is generates significantly slower code).  

   By default we enforce precise exns for guest R1 (stack pointer),
   CIA (current insn address) and LR (link register).  These are the
   minimum needed to extract correct stack backtraces from ppc
   code. [[NB: not sure if keeping LR up to date is actually
   necessary.]]
*/
Bool guest_ppc32_state_requires_precise_mem_exns ( Int minoff, 
                                                   Int maxoff )
{
   Int lr_min  = offsetof(VexGuestPPC32State, guest_LR);
   Int lr_max  = lr_min + 4 - 1;
   Int r1_min  = offsetof(VexGuestPPC32State, guest_GPR1);
   Int r1_max  = r1_min + 4 - 1;
   Int cia_min = offsetof(VexGuestPPC32State, guest_CIA);
   Int cia_max = cia_min + 4 - 1;

   if (maxoff < lr_min || minoff > lr_max) {
      /* no overlap with LR */
   } else {
      return True;
   }

   if (maxoff < r1_min || minoff > r1_max) {
      /* no overlap with R1 */
   } else {
      return True;
   }

   if (maxoff < cia_min || minoff > cia_max) {
      /* no overlap with CIA */
   } else {
      return True;
   }

   return False;
}

Bool guest_ppc64_state_requires_precise_mem_exns ( Int minoff, 
                                                   Int maxoff )
{
   /* Given that R2 is a Big Deal in the ELF ppc64 ABI, it seems
      prudent to be conservative with it, even though thus far there
      is no evidence to suggest that it actually needs to be kept up
      to date wrt possible exceptions. */
   Int lr_min  = offsetof(VexGuestPPC64State, guest_LR);
   Int lr_max  = lr_min + 8 - 1;
   Int r1_min  = offsetof(VexGuestPPC64State, guest_GPR1);
   Int r1_max  = r1_min + 8 - 1;
   Int r2_min  = offsetof(VexGuestPPC64State, guest_GPR2);
   Int r2_max  = r2_min + 8 - 1;
   Int cia_min = offsetof(VexGuestPPC64State, guest_CIA);
   Int cia_max = cia_min + 8 - 1;

   if (maxoff < lr_min || minoff > lr_max) {
      /* no overlap with LR */
   } else {
      return True;
   }

   if (maxoff < r1_min || minoff > r1_max) {
      /* no overlap with R1 */
   } else {
      return True;
   }

   if (maxoff < r2_min || minoff > r2_max) {
      /* no overlap with R2 */
   } else {
      return True;
   }

   if (maxoff < cia_min || minoff > cia_max) {
      /* no overlap with CIA */
   } else {
      return True;
   }

   return False;
}


#define ALWAYSDEFD32(field)                           \
    { offsetof(VexGuestPPC32State, field),            \
      (sizeof ((VexGuestPPC32State*)0)->field) }

VexGuestLayout
   ppc32Guest_layout 
      = { 
          /* Total size of the guest state, in bytes. */
          .total_sizeB = sizeof(VexGuestPPC32State),

          /* Describe the stack pointer. */
          .offset_SP = offsetof(VexGuestPPC32State,guest_GPR1),
          .sizeof_SP = 4,

          /* Describe the instruction pointer. */
          .offset_IP = offsetof(VexGuestPPC32State,guest_CIA),
          .sizeof_IP = 4,

          /* Describe any sections to be regarded by Memcheck as
             'always-defined'. */
          .n_alwaysDefd = 8,

          .alwaysDefd 
	  = { /*  0 */ ALWAYSDEFD32(guest_CIA),
	      /*  1 */ ALWAYSDEFD32(guest_EMWARN),
	      /*  2 */ ALWAYSDEFD32(guest_TISTART),
	      /*  3 */ ALWAYSDEFD32(guest_TILEN),
	      /*  4 */ ALWAYSDEFD32(guest_VSCR),
	      /*  5 */ ALWAYSDEFD32(guest_FPROUND),
	      /*  6 */ ALWAYSDEFD32(guest_RESVN),
	      /*  7 */ ALWAYSDEFD32(guest_NRADDR)
            }
        };

#define ALWAYSDEFD64(field)                           \
    { offsetof(VexGuestPPC64State, field),            \
      (sizeof ((VexGuestPPC64State*)0)->field) }

VexGuestLayout
   ppc64Guest_layout 
      = { 
          /* Total size of the guest state, in bytes. */
          .total_sizeB = sizeof(VexGuestPPC64State),

          /* Describe the stack pointer. */
          .offset_SP = offsetof(VexGuestPPC64State,guest_GPR1),
          .sizeof_SP = 8,

          /* Describe the instruction pointer. */
          .offset_IP = offsetof(VexGuestPPC64State,guest_CIA),
          .sizeof_IP = 8,

          /* Describe any sections to be regarded by Memcheck as
             'always-defined'. */
          .n_alwaysDefd = 11,

          .alwaysDefd 
	  = { /*  0 */ ALWAYSDEFD64(guest_CIA),
	      /*  1 */ ALWAYSDEFD64(guest_EMWARN),
	      /*  2 */ ALWAYSDEFD64(guest_TISTART),
	      /*  3 */ ALWAYSDEFD64(guest_TILEN),
	      /*  4 */ ALWAYSDEFD64(guest_VSCR),
	      /*  5 */ ALWAYSDEFD64(guest_FPROUND),
	      /*  6 */ ALWAYSDEFD64(guest_RESVN),
	      /*  7 */ ALWAYSDEFD64(guest_NRADDR),
	      /*  8 */ ALWAYSDEFD64(guest_NRADDR_GPR2),
	      /*  9 */ ALWAYSDEFD64(guest_REDIR_SP),
	      /* 10 */ ALWAYSDEFD64(guest_REDIR_STACK)
            }
        };

/*---------------------------------------------------------------*/
/*--- end                                guest-ppc/ghelpers.c ---*/
/*---------------------------------------------------------------*/