footpresure.tlg

工程中使用的一段资源管理vhdl程序,有简单的分频代码

// Batch Timer Log File (Release Version: 6.0.00.33.17.06)

//  Project = footpresure
//  Family  = lc4k
//  Device  = LC4128V
//  Speed   = -7.5
//  Voltage = 3.3
//  Operating Condition = IND
//  Data sheet version  = 3.2

//  Pass Bidirection = OFF
//  Pass S/R = OFF
//  Pass Latch = OFF
//  Pass Clock = OFF
//  Maximum Paths = 20
//  T_SU Endpoints D/T inputs = ON
//  T_SU Endpoints CE inputs = OFF
//  T_SU Endpoints S/R inputs = OFF
//  T_SU Endpoints RAM gated = ON
//  Fmax of CE = ON
//  Fmax of RAM = ON

//  Location(From => To)
//    Pin number: numeric number preceded by "p", BGA number as is
//    Macrocell number: Segment#,GLB#,Macrocell#
//                      Segment#: starts from 0 (if applicable)
//                      GLB#: starts from A..Z, AA..ZZ
//                      Macrocell#: starts from 0 to 31
// No path for Reg-to-reg/tPD found.