decoder_top.edn

这是Actel 的FPGA的译码器的VHDL源代码。

(edif decoder_top
  (edifVersion 2 0 0)
  (edifLevel 0)
  (keywordMap (keywordLevel 0))
  (status
    (written
      (timeStamp 2008 8 18 15 6 28)
      (author "Synplicity, Inc.")
      (program "Synplify Pro" (version "Version 9.0.2A2, mapper 9.0.2, Build 065R"))
     )
   )
  (library PA3
    (edifLevel 0)
    (technology (numberDefinition ))
    (cell VCC (cellType GENERIC)
      (property dont_touch (string "false"))
       (view prim (viewType NETLIST)
         (interface
           (port Y (direction OUTPUT)
           (property function (string "1"))
 )
         )
       )
    )
    (cell OUTBUF (cellType GENERIC)
      (property preferred (string "true"))
      (property pad_cell (string "true"))
      (property dont_touch (string "false"))
       (view prim (viewType NETLIST)
         (interface
           (port PAD (direction OUTPUT)
           (property function (string "D"))
           (property is_pad (string "true"))
 )
           (port D (direction INPUT)
 )
         )
       )
    )
    (cell OR3C (cellType GENERIC)
      (property dont_touch (string "false"))
       (view prim (viewType NETLIST)
         (interface
           (port Y (direction OUTPUT)
           (property function (string "!A + !B + !C"))
 )
           (port A (direction INPUT)
 )
           (port B (direction INPUT)
 )
           (port C (direction INPUT)
 )
         )
        (property is_combinational (integer 1))
       )
    )
    (cell NOR3C (cellType GENERIC)
      (property dont_touch (string "false"))
       (view prim (viewType NETLIST)
         (interface
           (port Y (direction OUTPUT)
           (property function (string "!(!A + !B + !C)"))
 )
           (port A (direction INPUT)
 )
           (port B (direction INPUT)
 )
           (port C (direction INPUT)
 )
         )
        (property is_combinational (integer 1))
       )
    )
    (cell NAND3C (cellType GENERIC)
      (property dont_touch (string "false"))
       (view prim (viewType NETLIST)
         (interface
           (port Y (direction OUTPUT)
           (property function (string "!(!A & !B & !C)"))
 )
           (port A (direction INPUT)
 )
           (port B (direction INPUT)
 )
           (port C (direction INPUT)
 )
         )
        (property is_combinational (integer 1))
       )
    )
    (cell NAND3B (cellType GENERIC)
      (property dont_touch (string "false"))
       (view prim (viewType NETLIST)
         (interface
           (port Y (direction OUTPUT)
           (property function (string "!(!A & !B & C)"))
 )
           (port A (direction INPUT)
 )
           (port B (direction INPUT)
 )
           (port C (direction INPUT)
 )
         )
        (property is_combinational (integer 1))
       )
    )
    (cell NAND3A (cellType GENERIC)
      (property dont_touch (string "false"))
       (view prim (viewType NETLIST)
         (interface
           (port Y (direction OUTPUT)
           (property function (string "!(!A & B & C)"))
 )
           (port A (direction INPUT)
 )
           (port B (direction INPUT)
 )
           (port C (direction INPUT)
 )
         )
        (property is_combinational (integer 1))
       )
    )
    (cell INBUF (cellType GENERIC)
      (property preferred (string "true"))
      (property pad_cell (string "true"))
      (property dont_touch (string "false"))
       (view prim (viewType NETLIST)
         (interface
           (port Y (direction OUTPUT)
           (property function (string "PAD"))
 )
           (port PAD (direction INPUT)
           (property is_pad (string "true"))
 )
         )
       )
    )
    (cell GND (cellType GENERIC)
      (property dont_touch (string "false"))
       (view prim (viewType NETLIST)
         (interface
           (port Y (direction OUTPUT)
           (property function (string "0"))
 )
         )
       )
    )
    (cell DFN1 (cellType GENERIC)
      (property is_sequential (integer 1))
      (property dont_touch (string "false"))
       (view prim (viewType NETLIST)
         (interface
           (port Q (direction OUTPUT)
           (property function (string "IQ"))
 )
           (port CLK (direction INPUT)
           (property clock (integer 1))
 )
           (port D (direction INPUT)
 )
         )
        (property is_ff (integer 1))
       )
    )
  )
  (library work
    (edifLevel 0)
    (technology (numberDefinition ))
    (cell Decoder (cellType GENERIC)
       (view netlist (viewType NETLIST)
         (interface
           (port (array (rename eq_c "Eq_c[3:0]") 4) (direction OUTPUT))
           (port KEY_0_key_out2 (direction INPUT))
           (port KEY_0_key_out1 (direction INPUT))
           (port Decoder_GND (direction INPUT))
         )
         (contents
          (instance NAND3B_Eq_2_inst (viewRef prim (cellRef NAND3B (libraryRef PA3)))
           (property is_instantiated (integer 1))
          )
          (instance NAND3B_Eq_1_inst (viewRef prim (cellRef NAND3B (libraryRef PA3)))
           (property is_instantiated (integer 1))
          )
          (instance NAND3C_Eq_0_inst (viewRef prim (cellRef NAND3C (libraryRef PA3)))
           (property is_instantiated (integer 1))
          )
          (instance NAND3A_Eq_3_inst (viewRef prim (cellRef NAND3A (libraryRef PA3)))
           (property is_instantiated (integer 1))
          )
          (instance VCC_i (viewRef prim (cellRef VCC (libraryRef PA3)))          )
          (instance GND_i (viewRef prim (cellRef GND (libraryRef PA3)))          )
          (instance VCC_i_0 (viewRef prim (cellRef VCC (libraryRef PA3)))          )
          (instance GND_i_0 (viewRef prim (cellRef GND (libraryRef PA3)))          )
          (net (rename Eq_c_2 "Eq_c[2]") (joined
           (portRef Y (instanceRef NAND3B_Eq_2_inst))
           (portRef (member eq_c 1))
          ))
          (net (rename Eq_c_1 "Eq_c[1]") (joined
           (portRef Y (instanceRef NAND3B_Eq_1_inst))
           (portRef (member eq_c 2))
          ))
          (net KEY_0_key_out2 (joined
           (portRef KEY_0_key_out2)
           (portRef C (instanceRef NAND3A_Eq_3_inst))
           (portRef A (instanceRef NAND3C_Eq_0_inst))
           (portRef A (instanceRef NAND3B_Eq_1_inst))
           (portRef C (instanceRef NAND3B_Eq_2_inst))
          ))
          (net Decoder_GND (joined
           (portRef Decoder_GND)
           (portRef A (instanceRef NAND3A_Eq_3_inst))
           (portRef C (instanceRef NAND3C_Eq_0_inst))
           (portRef B (instanceRef NAND3B_Eq_1_inst))
           (portRef A (instanceRef NAND3B_Eq_2_inst))
          ))
          (net KEY_0_key_out1 (joined
           (portRef KEY_0_key_out1)
           (portRef B (instanceRef NAND3A_Eq_3_inst))
           (portRef B (instanceRef NAND3C_Eq_0_inst))
           (portRef C (instanceRef NAND3B_Eq_1_inst))
           (portRef B (instanceRef NAND3B_Eq_2_inst))
          ))
          (net (rename Eq_c_0 "Eq_c[0]") (joined
           (portRef Y (instanceRef NAND3C_Eq_0_inst))
           (portRef (member eq_c 3))
          ))
          (net (rename Eq_c_3 "Eq_c[3]") (joined
           (portRef Y (instanceRef NAND3A_Eq_3_inst))
           (portRef (member eq_c 0))
          ))
          (net GND (joined
           (portRef Y (instanceRef GND_i))
          ))
          (net VCC (joined
           (portRef Y (instanceRef VCC_i))
          ))
          (net (rename GNDZ0 "GND") (joined
           (portRef Y (instanceRef GND_i_0))
          ))
          (net (rename VCCZ0 "VCC") (joined
           (portRef Y (instanceRef VCC_i_0))
          ))
         )
       )
    )
    (cell KEY (cellType GENERIC)