ch8_matrix.fit.qmsg

用fpga+usb显现的4通道800K的数据采集方案

{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:00 " "Info: Fitter placement preparation operations ending: elapsed time is 00:00:00" {  } {  } 0 0 "Fitter placement preparation operations ending: elapsed time is %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Info: Fitter placement operations beginning" {  } {  } 0 0 "Fitter placement operations beginning" 0 0}
{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Info: Fitter placement was successful" {  } {  } 0 0 "Fitter placement was successful" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:00 " "Info: Fitter placement operations ending: elapsed time is 00:00:00" {  } {  } 0 0 "Fitter placement operations ending: elapsed time is %1!s!" 0 0}
{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "4.412 ns register register " "Info: Estimated most critical path is register to register delay of 4.412 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns my_DFF:inst13\|Q 1 REG LAB_X68_Y30 8 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X68_Y30; Fanout = 8; REG Node = 'my_DFF:inst13\|Q'" {  } { { "d:/program files/quartusii/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii/quartus/bin/TimingClosureFloorplan.fld" "" "" { my_DFF:inst13|Q } "NODE_NAME" } } { "my_DFF.v" "" { Text "C:/Documents and Settings/Administrator.LEFAN/桌面/8通道调试程序/4通道800K加判断(修改方案后)/my_DFF.v" 3 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.230 ns) + CELL(0.650 ns) 0.880 ns gating_pulse:inst\|counter_small_Get\[4\]~638 2 COMB LAB_X68_Y30 5 " "Info: 2: + IC(0.230 ns) + CELL(0.650 ns) = 0.880 ns; Loc. = LAB_X68_Y30; Fanout = 5; COMB Node = 'gating_pulse:inst\|counter_small_Get\[4\]~638'" {  } { { "d:/program files/quartusii/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii/quartus/bin/TimingClosureFloorplan.fld" "" "0.880 ns" { my_DFF:inst13|Q gating_pulse:inst|counter_small_Get[4]~638 } "NODE_NAME" } } { "gating_pulse.v" "" { Text "C:/Documents and Settings/Administrator.LEFAN/桌面/8通道调试程序/4通道800K加判断(修改方案后)/gating_pulse.v" 110 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.161 ns) + CELL(0.651 ns) 1.692 ns gating_pulse:inst\|counter_small_Get\[4\]~644 3 COMB LAB_X68_Y30 2 " "Info: 3: + IC(0.161 ns) + CELL(0.651 ns) = 1.692 ns; Loc. = LAB_X68_Y30; Fanout = 2; COMB Node = 'gating_pulse:inst\|counter_small_Get\[4\]~644'" {  } { { "d:/program files/quartusii/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii/quartus/bin/TimingClosureFloorplan.fld" "" "0.812 ns" { gating_pulse:inst|counter_small_Get[4]~638 gating_pulse:inst|counter_small_Get[4]~644 } "NODE_NAME" } } { "gating_pulse.v" "" { Text "C:/Documents and Settings/Administrator.LEFAN/桌面/8通道调试程序/4通道800K加判断(修改方案后)/gating_pulse.v" 110 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.188 ns) + CELL(0.616 ns) 2.496 ns gating_pulse:inst\|counter_small_Get\[4\]~646 4 COMB LAB_X68_Y30 5 " "Info: 4: + IC(0.188 ns) + CELL(0.616 ns) = 2.496 ns; Loc. = LAB_X68_Y30; Fanout = 5; COMB Node = 'gating_pulse:inst\|counter_small_Get\[4\]~646'" {  } { { "d:/program files/quartusii/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii/quartus/bin/TimingClosureFloorplan.fld" "" "0.804 ns" { gating_pulse:inst|counter_small_Get[4]~644 gating_pulse:inst|counter_small_Get[4]~646 } "NODE_NAME" } } { "gating_pulse.v" "" { Text "C:/Documents and Settings/Administrator.LEFAN/桌面/8通道调试程序/4通道800K加判断(修改方案后)/gating_pulse.v" 110 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.061 ns) + CELL(0.855 ns) 4.412 ns gating_pulse:inst\|counter_small_Get\[3\] 5 REG LAB_X66_Y30 4 " "Info: 5: + IC(1.061 ns) + CELL(0.855 ns) = 4.412 ns; Loc. = LAB_X66_Y30; Fanout = 4; REG Node = 'gating_pulse:inst\|counter_small_Get\[3\]'" {  } { { "d:/program files/quartusii/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii/quartus/bin/TimingClosureFloorplan.fld" "" "1.916 ns" { gating_pulse:inst|counter_small_Get[4]~646 gating_pulse:inst|counter_small_Get[3] } "NODE_NAME" } } { "gating_pulse.v" "" { Text "C:/Documents and Settings/Administrator.LEFAN/桌面/8通道调试程序/4通道800K加判断(修改方案后)/gating_pulse.v" 110 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.772 ns ( 62.83 % ) " "Info: Total cell delay = 2.772 ns ( 62.83 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.640 ns ( 37.17 % ) " "Info: Total interconnect delay = 1.640 ns ( 37.17 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/program files/quartusii/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii/quartus/bin/TimingClosureFloorplan.fld" "" "4.412 ns" { my_DFF:inst13|Q gating_pulse:inst|counter_small_Get[4]~638 gating_pulse:inst|counter_small_Get[4]~644 gating_pulse:inst|counter_small_Get[4]~646 gating_pulse:inst|counter_small_Get[3] } "NODE_NAME" } }  } 0 0 "Estimated most critical path is %2!s! to %3!s! delay of %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Info: Fitter routing operations beginning" {  } {  } 0 0 "Fitter routing operations beginning" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "0 0 " "Info: Average interconnect usage is 0% of the available device resources. Peak interconnect usage is 0%" { { "Info" "IFITAPI_FITAPI_VPR_PEAK_ROUTING_REGION" "X84_Y39 X95_Y51 " "Info: The peak interconnect region extends from location X84_Y39 to location X95_Y51" {  } {  } 0 0 "The peak interconnect region extends from location %1!s! to location %2!s!" 0 0}  } {  } 0 0 "Average interconnect usage is %1!d!%% of the available device resources. Peak interconnect usage is %2!d!%%" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:01 " "Info: Fitter routing operations ending: elapsed time is 00:00:01" {  } {  } 0 0 "Fitter routing operations ending: elapsed time is %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "Info: The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." { { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_ROUTABILITY" "" "Info: Optimizations that may affect the design's routability were skipped" {  } {  } 0 0 "Optimizations that may affect the design's routability were skipped" 0 0} { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_TIMING" "" "Info: Optimizations that may affect the design's timing were skipped" {  } {  } 0 0 "Optimizations that may affect the design's timing were skipped" 0 0}  } {  } 0 0 "The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." 0 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0 0 "Started post-fitting delay annotation" 0 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0 0 "Delay annotation completed successfully" 0 0}
{ "Warning" "WFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN" "2 " "Warning: Following 2 pins have nothing, GND, or VCC driving datain port -- changes to this connectivity may change fitting results" { { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "RDY0 VCC " "Info: Pin RDY0 has VCC driving its datain port" {  } { { "CH8_Matrix.bdf" "" { Schematic "C:/Documents and Settings/Administrator.LEFAN/桌面/8通道调试程序/4通道800K加判断(修改方案后)/CH8_Matrix.bdf" { { -832 456 632 -816 "RDY0" "" } } } } { "d:/program files/quartusii/quartus/bin/Assignment Editor.qase" "" { Assignment "d:/program files/quartusii/quartus/bin/Assignment Editor.qase" 1 { { 0 "RDY0" } } } } { "d:/program files/quartusii/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii/quartus/bin/TimingClosureFloorplan.fld" "" "" { RDY0 } "NODE_NAME" } } { "d:/program files/quartusii/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii/quartus/bin/TimingClosureFloorplan.fld" "" "" { RDY0 } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "PDWN8 GND " "Info: Pin PDWN8 has GND driving its datain port" {  } { { "CH8_Matrix.bdf" "" { Schematic "C:/Documents and Settings/Administrator.LEFAN/桌面/8通道调试程序/4通道800K加判断(修改方案后)/CH8_Matrix.bdf" { { -752 760 936 -736 "PDWN8" "" } } } } { "d:/program files/quartusii/quartus/bin/Assignment Editor.qase" "" { Assignment "d:/program files/quartusii/quartus/bin/Assignment Editor.qase" 1 { { 0 "PDWN8" } } } } { "d:/program files/quartusii/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii/quartus/bin/TimingClosureFloorplan.fld" "" "" { PDWN8 } "NODE_NAME" } } { "d:/program files/quartusii/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii/quartus/bin/TimingClosureFloorplan.fld" "" "" { PDWN8 } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0}  } {  } 0 0 "Following %1!d! pins have nothing, GND, or VCC driving datain port -- changes to this connectivity may change fitting results" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 2 s Quartus II " "Info: Quartus II Fitter was successful. 0 errors, 2 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "291 " "Info: Allocated 291 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0} { "Info" "IQEXE_END_BANNER_TIME" "Wed Jun 04 13:12:52 2008 " "Info: Processing ended: Wed Jun 04 13:12:52 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:43 " "Info: Elapsed time: 00:00:43" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}
{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "C:/Documents and Settings/Administrator.LEFAN/桌面/8通道调试程序/4通道800K加判断(修改方案后)/CH8_Matrix.fit.smsg " "Info: Generated suppressed messages file C:/Documents and Settings/Administrator.LEFAN/桌面/8通道调试程序/4通道800K加判断(修改方案后)/CH8_Matrix.fit.smsg" {  } {  } 0 0 "Generated suppressed messages file %1!s!" 0 0}