gating_pulse.v

用fpga+usb显现的4通道800K的数据采集方案

module gating_pulse(PS_flag,FlagB,CLK,Update,TP,TB,PS10,PS20,AD_CLK,Get_CLK,SLWR);   //TP为门控脉冲，TB为压地波脉冲
input PS_flag,FlagB,CLK;                          //FM为AD9954触发脉冲
output Update,TP,TB,PS10,PS20,AD_CLK,Get_CLK,SLWR; 
                   //2800D＝6D60H
reg Update,TP,TB,PS10,PS20,AD_CLK,Get_CLK,SLWR;

reg temp_Update,temp_TP,temp_TB,temp_FM,temp_AD_CLK,temp_Get_CLK,temp_SLWR;
reg[18:0] counter_big;
reg[4:0]  counter_small_AD,counter_small_Get,counter_small_SLWR;
reg AD_Flag,Get_Flag,SLWR_Flag;
//-------------------------------

always@(posedge CLK)//20M 的时钟 ,0.05us
begin
if(PS_flag)
  begin
    if((!FlagB)&&temp_SLWR)
      begin
        counter_big<=counter_big;
      end      
    else
      begin
        if(counter_big==122499)counter_big<=0;//周期是6.125ms(61250*2-1=122499)
        else counter_big<=counter_big+19'b1;
      end        
  end 
else
  begin
    counter_big<=19'b0;
  end
end

always@(counter_big or PS_flag)
begin
  if(PS_flag)
    begin
      if((counter_big>=0)&&(counter_big<=122499-20000+50))
        begin
          AD_Flag<=1;
        end
      else
        begin
          AD_Flag<=0;
        end
    end
  else
    begin
      AD_Flag<=0;
    end
end

always@(counter_big or PS_flag)
begin
  if(PS_flag)
    begin
      if((counter_big>=(0+125+25))&&(counter_big<=122499-20000+50))
        begin
          Get_Flag<=1;
        end
      else
        begin
          Get_Flag<=0;
        end
    end
  else
    begin
      Get_Flag<=0;
    end
end

always@(counter_big or PS_flag)
begin
  if(PS_flag)
    begin
      if((counter_big>=(0+125+25+6))&&(counter_big<=122499-20000+50))
        begin
          SLWR_Flag<=1;
        end
      else
        begin
          SLWR_Flag<=0;
        end
    end
  else
    begin
      SLWR_Flag<=0;
    end
end
      
always@(posedge CLK)//20M 的时钟
begin
if(PS_flag&&AD_Flag)
  begin
    if((!FlagB)&&temp_SLWR)
      begin
        counter_small_AD<=counter_small_AD;
      end
    else
      begin
        if(counter_small_AD==24)counter_small_AD<=0;//周期是1.25us
        else counter_small_AD<=counter_small_AD+5'b1;
      end  
  end
else
  begin
    counter_small_AD<=5'b0;
  end
end      

always@(posedge CLK)//20M 的时钟
begin
if(PS_flag&&Get_Flag)
  begin
    if((!FlagB)&&temp_SLWR)
      begin
        counter_small_Get<=counter_small_Get;
      end 
    else
      begin
        if(counter_small_Get==24)counter_small_Get<=0;//周期是1.25us
        else counter_small_Get<=counter_small_Get+5'b1;
      end
  end
else
  begin
    counter_small_Get<=5'b0;
  end
end

always@(posedge CLK)//20M 的时钟
begin
if(PS_flag&&SLWR_Flag)
  begin
    if((!FlagB)&&temp_SLWR)
      begin
         counter_small_SLWR<=counter_small_SLWR;
      end
    else
      begin
        if(counter_small_SLWR==24)counter_small_SLWR<=0;//周期是1.25us
        else counter_small_SLWR<=counter_small_SLWR+5'b1;
      end
  end
else
  begin
    counter_small_SLWR<=5'b0;
  end
end

always@(posedge CLK)
begin
 PS10<=temp_FM;
 PS20<=temp_FM;
 TB<=temp_TB;
 TP<=temp_TP;
 Update<=temp_Update;
 AD_CLK<=temp_AD_CLK;
 Get_CLK<=temp_Get_CLK;
 SLWR<=temp_SLWR;
end

always@(counter_big or PS_flag)
begin
 if(PS_flag)
   begin
    if((counter_big>=0+125-50)&&(counter_big<=122499-20000+50+50))temp_Update<=1;//扫频触发脉冲和TP对齐 (79000) 
    else temp_Update<=0;
   end
 else
  begin
    temp_Update<=0;
  end
end

always@(counter_big or PS_flag)
begin
 if(PS_flag)
   begin
    if((counter_big>=0+125)&&(counter_big<=122499-20000+50))temp_FM<=1;//扫频触发脉冲和TP对齐 (79000) 
    else temp_FM<=0;
   end
 else
  begin
    temp_FM<=0;
  end
end

always@(counter_big or PS_flag)
begin
  if(PS_flag)
    begin
      if((counter_big>=0)&&(counter_big<=122499-20000+50))temp_TP<=1;//TP高电平持续时间是7.9ms (79000) 
      else temp_TP<=0;
    end
  else
    begin
      temp_TP<=0;
    end
end

always@(counter_big or PS_flag)
begin
  if(PS_flag)
    begin
     if((counter_big>=0)&&(counter_big<=122499-20000+50))temp_TB<=1;//TB滞后TP 2ms（TB低电平持续时间9.9ms(999000)) 
     else temp_TB<=0;
    end
  else 
    begin
     temp_TB<=0;
    end
end

always@(PS_flag or counter_small_AD)
begin
  if(PS_flag)//AD采集数据后写到USB的控制信号 
    begin
      if(counter_small_AD>=0 && counter_small_AD<=12)
        begin 
          temp_AD_CLK<=0;
        end
      else
        begin 
          temp_AD_CLK<=1;
        end
    end
  else 
    begin
     temp_AD_CLK<=0;
    end
end

always@(PS_flag or counter_small_Get)
begin
  if(PS_flag)//AD采集数据后写到USB的控制信号 
    begin
      if(counter_small_Get>=1 && counter_small_Get<=12)
        begin 
          temp_Get_CLK<=1;
        end
      else
        begin 
          temp_Get_CLK<=0;
        end
    end
  else 
    begin
      temp_Get_CLK<=0;
    end
end

always@(PS_flag or counter_small_SLWR)
begin
  if(PS_flag)//AD采集数据后写到USB的控制信号 
    begin
      if(counter_small_SLWR>=1 && counter_small_SLWR<=12)
        begin 
          temp_SLWR<=0;
        end
      else
        begin 
          temp_SLWR<=1;
        end
    end
  else 
    begin
     temp_SLWR<=1;
    end
end

endmodule