ch8_matrix.sim.rpt

用fpga+usb显现的4通道800K的数据采集方案

; |CH8_Matrix|RST2                                                   ; |CH8_Matrix|RST2                                                   ; padio            ;
; |CH8_Matrix|led3                                                   ; |CH8_Matrix|led3                                                   ; padio            ;
; |CH8_Matrix|led1                                                   ; |CH8_Matrix|led1                                                   ; padio            ;
; |CH8_Matrix|RDY0                                                   ; |CH8_Matrix|RDY0                                                   ; padio            ;
; |CH8_Matrix|D_sin[15]                                              ; |CH8_Matrix|D_sin[15]                                              ; padio            ;
; |CH8_Matrix|D_sin[14]                                              ; |CH8_Matrix|D_sin[14]                                              ; padio            ;
; |CH8_Matrix|D_sin[13]                                              ; |CH8_Matrix|D_sin[13]                                              ; padio            ;
; |CH8_Matrix|D_sin[12]                                              ; |CH8_Matrix|D_sin[12]                                              ; padio            ;
; |CH8_Matrix|D_sin[11]                                              ; |CH8_Matrix|D_sin[11]                                              ; padio            ;
; |CH8_Matrix|D_sin[10]                                              ; |CH8_Matrix|D_sin[10]                                              ; padio            ;
; |CH8_Matrix|D_sin[9]                                               ; |CH8_Matrix|D_sin[9]                                               ; padio            ;
; |CH8_Matrix|D_sin[8]                                               ; |CH8_Matrix|D_sin[8]                                               ; padio            ;
; |CH8_Matrix|D_sin[7]                                               ; |CH8_Matrix|D_sin[7]                                               ; padio            ;
; |CH8_Matrix|D_sin[6]                                               ; |CH8_Matrix|D_sin[6]                                               ; padio            ;
; |CH8_Matrix|D_sin[5]                                               ; |CH8_Matrix|D_sin[5]                                               ; padio            ;
; |CH8_Matrix|D_sin[4]                                               ; |CH8_Matrix|D_sin[4]                                               ; padio            ;
; |CH8_Matrix|D_sin[3]                                               ; |CH8_Matrix|D_sin[3]                                               ; padio            ;
; |CH8_Matrix|D_sin[2]                                               ; |CH8_Matrix|D_sin[2]                                               ; padio            ;
; |CH8_Matrix|D_sin[1]                                               ; |CH8_Matrix|D_sin[1]                                               ; padio            ;
; |CH8_Matrix|D_sin[0]                                               ; |CH8_Matrix|D_sin[0]                                               ; padio            ;
; |CH8_Matrix|RST_in                                                 ; |CH8_Matrix|RST_in                                                 ; combout          ;
; |CH8_Matrix|flagb                                                  ; |CH8_Matrix|flagb                                                  ; combout          ;
; |CH8_Matrix|Update_in                                              ; |CH8_Matrix|Update_in                                              ; combout          ;
; |CH8_Matrix|CLK1_in                                                ; |CH8_Matrix|CLK1_in                                                ; combout          ;
; |CH8_Matrix|IOA0                                                   ; |CH8_Matrix|IOA0                                                   ; combout          ;
; |CH8_Matrix|CLK2_in                                                ; |CH8_Matrix|CLK2_in                                                ; combout          ;
; |CH8_Matrix|SD_in                                                  ; |CH8_Matrix|SD_in                                                  ; combout          ;
; |CH8_Matrix|AD_in[13]                                              ; |CH8_Matrix|AD_in[13]                                              ; combout          ;
; |CH8_Matrix|AD_in[12]                                              ; |CH8_Matrix|AD_in[12]                                              ; combout          ;
; |CH8_Matrix|AD_in[11]                                              ; |CH8_Matrix|AD_in[11]                                              ; combout          ;
; |CH8_Matrix|AD_in[10]                                              ; |CH8_Matrix|AD_in[10]                                              ; combout          ;
; |CH8_Matrix|AD_in[9]                                               ; |CH8_Matrix|AD_in[9]                                               ; combout          ;
; |CH8_Matrix|AD_in[8]                                               ; |CH8_Matrix|AD_in[8]                                               ; combout          ;
; |CH8_Matrix|AD_in[7]                                               ; |CH8_Matrix|AD_in[7]                                               ; combout          ;
; |CH8_Matrix|AD_in[6]                                               ; |CH8_Matrix|AD_in[6]                                               ; combout          ;
; |CH8_Matrix|AD_in[5]                                               ; |CH8_Matrix|AD_in[5]                                               ; combout          ;
; |CH8_Matrix|AD_in[4]                                               ; |CH8_Matrix|AD_in[4]                                               ; combout          ;
; |CH8_Matrix|AD_in[3]                                               ; |CH8_Matrix|AD_in[3]                                               ; combout          ;
; |CH8_Matrix|AD_in[2]                                               ; |CH8_Matrix|AD_in[2]                                               ; combout          ;
; |CH8_Matrix|AD_in[1]                                               ; |CH8_Matrix|AD_in[1]                                               ; combout          ;
; |CH8_Matrix|AD_in[0]                                               ; |CH8_Matrix|AD_in[0]                                               ; combout          ;
; |CH8_Matrix|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[10]~feeder ; |CH8_Matrix|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[10]~feeder ; combout          ;
; |CH8_Matrix|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[8]~feeder  ; |CH8_Matrix|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[8]~feeder  ; combout          ;
; |CH8_Matrix|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[7]~feeder  ; |CH8_Matrix|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[7]~feeder  ; combout          ;
; |CH8_Matrix|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[6]~feeder  ; |CH8_Matrix|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[6]~feeder  ; combout          ;
; |CH8_Matrix|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[4]~feeder  ; |CH8_Matrix|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[4]~feeder  ; combout          ;
; |CH8_Matrix|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[3]~feeder  ; |CH8_Matrix|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[3]~feeder  ; combout          ;
; |CH8_Matrix|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[2]~feeder  ; |CH8_Matrix|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[2]~feeder  ; combout          ;
; |CH8_Matrix|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[1]~feeder  ; |CH8_Matrix|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[1]~feeder  ; combout          ;
; |CH8_Matrix|HM_Tab:inst15|always0~0feeder                          ; |CH8_Matrix|HM_Tab:inst15|always0~0feeder                          ; combout          ;
; |CH8_Matrix|~DEV_CLRn~                                             ; |CH8_Matrix|~DEV_CLRn~                                             ; dev_clr_out      ;
+--------------------------------------------------------------------+--------------------------------------------------------------------+------------------+


+---------------------+
; Simulator INI Usage ;
+--------+------------+
; Option ; Usage      ;
+--------+------------+


+--------------------+
; Simulator Messages ;
+--------------------+
Info: *******************************************************************
Info: Running Quartus II Simulator
    Info: Version 7.0 Build 33 02/05/2007 SJ Full Version
    Info: Processing started: Tue Apr 22 21:58:06 2008
Info: Command: quartus_sim --read_settings_files=on --write_settings_files=off CH8_Matrix -c CH8_Matrix
Info: Using vector source file "C:/Documents and Settings/Administrator/桌面/济南实验用/FPGA程序/4通道800K加判断(修改方案后)/CH8_Matrix.vwf"
Info: Overwriting simulation input file with simulation results
    Info: A backup of CH8_Matrix.vwf called CH8_Matrix.sim_ori.vwf has been created in the db folder
Warning: Can't find signal in vector source file for input pin "|CH8_Matrix|RST_in"
Warning: Can't find signal in vector source file for input pin "|CH8_Matrix|CLK1_in"
Warning: Can't find signal in vector source file for input pin "|CH8_Matrix|IOA0"
Warning: Can't find signal in vector source file for input pin "|CH8_Matrix|CLK2_in"
Warning: Can't find signal in vector source file for input pin "|CH8_Matrix|SD_in"
Warning: Can't find signal in vector source file for input pin "|CH8_Matrix|AD_in[13]"
Warning: Can't find signal in vector source file for input pin "|CH8_Matrix|AD_in[12]"
Warning: Can't find signal in vector source file for input pin "|CH8_Matrix|AD_in[11]"
Warning: Can't find signal in vector source file for input pin "|CH8_Matrix|AD_in[10]"
Warning: Can't find signal in vector source file for input pin "|CH8_Matrix|AD_in[9]"
Warning: Can't find signal in vector source file for input pin "|CH8_Matrix|AD_in[8]"
Warning: Can't find signal in vector source file for input pin "|CH8_Matrix|AD_in[7]"
Warning: Can't find signal in vector source file for input pin "|CH8_Matrix|AD_in[6]"
Warning: Can't find signal in vector source file for input pin "|CH8_Matrix|AD_in[5]"
Warning: Can't find signal in vector source file for input pin "|CH8_Matrix|AD_in[4]"
Warning: Can't find signal in vector source file for input pin "|CH8_Matrix|AD_in[3]"
Warning: Can't find signal in vector source file for input pin "|CH8_Matrix|AD_in[2]"
Warning: Can't find signal in vector source file for input pin "|CH8_Matrix|AD_in[1]"
Warning: Can't find signal in vector source file for input pin "|CH8_Matrix|AD_in[0]"
Warning: Can't find signal in vector source file for input pin "|CH8_Matrix|~DEV_CLRn~"
Info: Option to preserve fewer signal transitions to reduce memory requirements is enabled
    Info: Simulation has been partitioned into sub-simulations according to the maximum transition count determined by the engine. Transitions from memory will be flushed out to disk at the end of each sub-simulation to reduce memory requirements.
Info: Simulation partitioned into 1 sub-simulations
Info: Simulation coverage is      65.17 %
Info: Number of transitions in simulation is 6991085
Info: Vector file CH8_Matrix.vwf is saved in VWF text format. You can compress it into CVWF format in order to reduce file size. For more details please refer to the Quartus II Help.
Info: Quartus II Simulator was successful. 0 errors, 20 warnings
    Info: Allocated 93 megabytes of memory during processing
    Info: Processing ended: Tue Apr 22 21:59:11 2008
    Info: Elapsed time: 00:01:05