coregen.cgp

FPGA芯片与ADI公司的AD9779之间的通信

# Date: Sun Feb 15 12:03:08 2009
SET addpads = False
SET asysymbol = False
SET busformat = BusFormatAngleBracketNotRipped
SET createndf = False
SET designentry = VHDL
SET device = xc5vfx130t
SET devicefamily = virtex5
SET flowvendor = Other
SET formalverification = False
SET foundationsym = False
SET implementationfiletype = Ngc
SET package = ff1738
SET removerpms = False
SET simulationfiles = Behavioral
SET speedgrade = -1
SET verilogsim = False
SET vhdlsim = True
SET workingdirectory = E:\linpingping\DAC\LVDS_DDR_List_FPGA2\tmp