ddr_tx_test.bld

来自「FPGA芯片与ADI公司的AD9779之间的通信」· BLD 代码 · 共 38 行

BLD

38 行

Release 10.1.02 ngdbuild K.37 (nt)Copyright (c) 1995-2008 Xilinx, Inc.  All rights reserved.Command Line: E:\FPGA\Xilinx\10.1\ISE\bin\nt\unwrapped\ngdbuild.exe -ise
E:/linpingping/ATCA_converge_board/DAC/LVDS_DDR_List_FPGA2/DDR_TX_TEST.ise
-intstyle ise -dd _ngo -nt timestamp -i -p xc5vfx130t-ff1738-1 DDR_TX_TEST.ngc
DDR_TX_TEST.ngdReading NGO file
"E:/linpingping/ATCA_converge_board/DAC/LVDS_DDR_List_FPGA2/DDR_TX_TEST.ngc" ...Reading in constraint information from 'DDR_TX_UCF.ucf'...Gathering constraint information from source properties...Done.Resolving constraint associations...Checking Constraint Associations...Done...Checking Partitions ...Checking expanded design ...Partition Implementation Status-------------------------------  No Partitions were found in this design.-------------------------------NGDBUILD Design Results Summary:  Number of errors:     0  Number of warnings:   0Total memory usage is 82196 kilobytesWriting NGD file "DDR_TX_TEST.ngd" ...Writing NGDBUILD log file "DDR_TX_TEST.bld"...

ddr_tx_test.bld - 源码说明

本页面展示了「FPGA芯片与ADI公司的AD9779之间的通信」中的 ddr_tx_test.bld 源码文件，采用 BLD 编程语言编写，共 38 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。

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