fp.vhd

来自「这是本人毕业设计的源码部分,主要完成了步进电机的智能控制:采用AVR系列单片机做」· VHDL 代码 · 共 78 行

library ieee;
use ieee.std_logic_1164.all;

entity fpei is            
port(clk        : std_logic;              --cpld端口定义
     direction  : std_logic;
     enable     : std_logic;
     clear      : std_logic;
     abcd       : std_logic_vector(3 downto 0) );
end fpei;

architecture behave of fpei is
subtype state_type is std_logic_vector(3 downto 0)
constant state0 : is state_type :="0000"; --步进电机时序表
constant state1 : is state_type :="1100";
constant state2 : is state_type :="0110";
constant state3 : is state_type :="0011";
constant state4 : is state_type :="1001";
signal state            : state_type;
signal direction_temp   : std_logic;
signal enable_temp      : std_logic;
signal clear_temp       : std_logic;
begin

process( clk, enable, direction, clear)   --上位机控制信号判断进程
if(clk'event and clk =1) then
  if enable = '1' then
     if clear ='1' then clear_temp <= '1';
     else clear_temp <= '0';
     end if;
     if direction = '1' then
          direction_temp <= '1';
     else direction_temp <= '0';
     end if;
  end if;
end if;
end process;

process( clk)                            --驱动时序产生进程
if(clk'event and clk =1) then
  if clear_temp = '1' then
        state <= state0;
  elsif direction_temp ='1' then
      case state is
        when state1 =>
          abcd <= state1;
          state <=state2;
        when state2 =>
          abcd <= state2;
          state <= state3;
        when state3 =>
          abcd <= state3;
          state <=state4;
        when state4 =>
          abcd <= state4;
          state <= state1;
      end case;
 elsif direction_temp ='0' then
     case state is
        when state4 =>
          abcd <= state4;
          state <=state3;
        when state3 =>
          abcd <= state3;
          state <= state2;
        when state2 =>
          abcd <= state2;
          state <=state1;
        when state1 =>
          abcd <= state1;
          state <= state4;
     end case;
  end if;
end if;
end proess;

end behave;