testuart1.asm

TMS320VC5402的串口应用实例,汇编语言写,是DSP入门学习的好帮手.

     .title " test vc5402'uart"
     .global mainstart
     .mmregs

swcr      .set      2bh


temp .set 60h
counter_rx .set 61h
counter_tx .set 62h
rx_data    .set 63h
tx_data    .set 64h
rx_temp    .set 65h
counter_error .set 66h


b_r_cs .set 8000h     ;IO boot/data_ram cs signal
set_ram .set 02h      ;set the 32K data space into ram
uart_data .set 0c000h     ;uart RBR,THR(DLAB=0);DLL(DLAB=1) register address
uart_ier .set 0c001h     ;uart IER(DLAB=0);DLM(DLAB=1) register address
uart_iir .set 0c002h     ;uart IIR,FCR register address
uart_lcr .set 0c003h     ;uart LCR register address
uart_mcr .set 0c004h     ;uart MCR register address
uart_lsr .set 0c005h     ;uart LSR register address
uart_msr .set 0c006h     ;uart MSR register address
uart_scr .set 0c007h     ;uart SCR register address


     .text
rs      b mainstart
        nop
        nop
nmi     b __ret
         nop
         nop
sint17  b __ret
        nop
        nop
sint18  b __ret
        nop
        nop
sint19  b __ret
        nop
        nop
sint20  b __ret
        .word   0,0
sint21  b __ret
        .word   0,0
sint22  .word   01000h
        .word   0,0,0
sint23  .word   0ff80h
        .word   0,0,0
sint24  .word   01000h
        .word   0,0,0
sint25  .word   0ff80h
        .word   0,0,0
sint26  .word   01000h
        .word   0,0,0
sint27  .word   0ff80h
        .word   0,0,0
sint28  .word   01000h
        .word   0,0,0
sint29  .word   0ff80h
        .word   0,0,0
sint30  .word   01000h
        .word   0,0,0
int0    b uartint
        nop
        nop
int1    b __ret
        nop
        nop
int2    b __ret
        nop
        nop
tint    b __ret
        nop
        nop
brint0  b __ret
        nop
        nop
bxint0  b __ret
        nop
        nop
trint   b  __ret
        nop
        nop
txint   b __ret
        nop
        nop
int3    b __ret
        nop
        nop
hpint   b __ret
        nop
        nop
q26     .word   0ff80h
        .word   0,0,0
q27     .word   01000h
        .word   0,0,0
q28     .word   0ff80h
        .word   0,0,0
q29     .word   01000h
        .word   0,0,0
q30     .word   0ff80h
        .word   0,0,0
q31     .word   01000h
        .word   0,0,0

mainstart:
     ssbx intm           ; close all int ! (ssbx intm)
     ssbx sxm            ; extend sign !
     ssbx frct           ; faction multiply
     stm  #10h,26h       ; stop TIMER0 !
     stm  #10h,36h       ; stop TIMER1 !
     stm  #0ffh,sp       ; sp= 0x0ff
     ld   #0,dp          ; dp=0 
     stm  #00a0h,pmst    ; vector table start: 0x8000(0x38000)
     stm  #0ffffh,ifr    ; clear all int !
     stm  #01h,imr       ; bit5->BXINT0, bit4->BRINT0, enable BXINT0
     stm  #02492h,swwsr  ; all 2 waits !
     stm  #0,swcr
     stm  #set_ram,temp
     portw temp,b_r_cs   ; map data_ram in 32k data space 

     
     nop

testuart:                 ;test the function of UART
     stm  #08bh,temp
     portw temp,uart_lcr  ;set LCR_D7=1 to set baudrate register
     nop
     nop
     stm  #24,temp
     portw temp,uart_data ;set DLL=24(baudrate=9600,primaryF=3.6864M)
     nop
     nop
     stm #0,temp
     portw temp,uart_iir    ;set DLM=0 (baudrate=9600,primaryF=3.6864M)
     nop
     nop
     stm #03h,temp
     portw temp,uart_lcr    ;set LCR_D7=0 and line control
     nop
     nop
     portr uart_iir,temp    ;to clear iir
     portr uart_lsr,temp    ;to clear lsr
     nop
     stm #03h,temp
     portw temp,uart_ier    ;enable receive,send ints
     nop
     nop
     stm #255,rx_data     ;init rx_data
     stm #0,counter_tx     ;init counter_tx
     stm #0,counter_rx     ;init counter_rx
     stm #0,counter_error     ;init counter_error

     rsbx intm            ;enable all interrupt

waitint:
     nop
     b   waitint
     nop
uartint:
read_iir:
     portr uart_iir,temp    ;to clear iir
     andm  #07h,temp
     ld    temp,a
     sub   #04h,a
     bc    receive_int,aeq
     ld    temp,a
     sub   #02h,a
     bc    transmit_int,aeq
     b     __ret

receive_int:
     portr  uart_data,rx_temp
     portw  rx_temp,uart_data
     b     __ret
     
transmit_int:     
     nop
     nop
     nop
__ret:      
     rete
    .end