bit_align_machine.bld

来自「FPGA之间的LVDS传输」· BLD 代码 · 共 35 行

BLD
35 行
字号 
Release 10.1.02 ngdbuild K.37 (nt)Copyright (c) 1995-2008 Xilinx, Inc.  All rights reserved.Command Line: K:\Xilinx\10.1\ISE\bin\nt\unwrapped\ngdbuild.exe -ise
E:/ISEworks/LVDS/xapp860/xapp860.ise -intstyle ise -dd _ngo -nt timestamp -i -p
xc5vsx50t-ff1136-1 BIT_ALIGN_MACHINE.ngc BIT_ALIGN_MACHINE.ngdReading NGO file "E:/ISEworks/LVDS/xapp860/BIT_ALIGN_MACHINE.ngc" ...Gathering constraint information from source properties...Done.Resolving constraint associations...Checking Constraint Associations...Done...Checking Partitions ...Checking expanded design ...Partition Implementation Status-------------------------------  No Partitions were found in this design.-------------------------------NGDBUILD Design Results Summary:  Number of errors:     0  Number of warnings:   0Total memory usage is 81636 kilobytesWriting NGD file "BIT_ALIGN_MACHINE.ngd" ...Writing NGDBUILD log file "BIT_ALIGN_MACHINE.bld"...

bit_align_machine.bld - 源码说明

本页面展示了「FPGA之间的LVDS传输」中的 bit_align_machine.bld 源码文件，采用 BLD 编程语言编写，共 35 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。

虫虫下载站收录了大量与FPGA相关的技术资源，包括源代码、技术文档、电路图等，是电子工程师和嵌入式开发者的专业学习平台。

⌨️ 快捷键说明

复制代码Ctrl + C
搜索代码Ctrl + F
全屏模式F11
增大字号Ctrl + =
减小字号Ctrl + -
显示快捷键?