lvds_bist_top.cmd_log

FPGA之间的LVDS传输

xst -ise "E:/ISEworks/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -ifn "E:/ISEworks/LVDS/LVDS_4to1/lvds_bist_top.xst" -ofn "E:/ISEworks/LVDS/LVDS_4to1/lvds_bist_top.syr"
xst -ise "E:/ISEworks/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -ifn "E:/ISEworks/LVDS/LVDS_4to1/lvds_bist_top.xst" -ofn "E:/ISEworks/LVDS/LVDS_4to1/lvds_bist_top.syr"
xst -ise "E:/ISEworks/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -ifn "E:/ISEworks/LVDS/LVDS_4to1/lvds_bist_top.xst" -ofn "E:/ISEworks/LVDS/LVDS_4to1/lvds_bist_top.syr"
ngdbuild -ise "E:/ISEworks/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -dd _ngo  -nt timestamp -i -p xc5vsx50t-ff1136-1 "lvds_bist_top.ngc" lvds_bist_top.ngd
map -ise "E:/ISEworks/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -p xc5vsx50t-ff1136-1 -w -logic_opt off -ol high -t 1 -cm area -pr o -k 6 -lc off -power off -o lvds_bist_top_map.ncd lvds_bist_top.ngd lvds_bist_top.pcf
ngdbuild -ise "E:/ISEworks/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -dd _ngo  -nt timestamp -i -p xc5vsx50t-ff1136-1 "lvds_bist_top.ngc" lvds_bist_top.ngd
map -ise "E:/ISEworks/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -p xc5vsx50t-ff1136-1 -w -logic_opt off -ol high -t 1 -cm area -pr o -k 6 -lc off -power off -o lvds_bist_top_map.ncd lvds_bist_top.ngd lvds_bist_top.pcf
par -ise "E:/ISEworks/LVDS/LVDS_4to1/xapp860.ise" -w -intstyle ise -ol std -t 1 lvds_bist_top_map.ncd lvds_bist_top.ncd lvds_bist_top.pcf
trce -ise "E:/ISEworks/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -v 3 -s 1 -xml lvds_bist_top lvds_bist_top.ncd -o lvds_bist_top.twr lvds_bist_top.pcf -ucf lvds_bist_top.ucf
netgen -ise "E:/ISEworks/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -s 1  -pcf lvds_bist_top.pcf -rpw 100 -tpw 0 -ar Structure -tm lvds_bist_top -insert_pp_buffers false -w -dir netgen/par -ofmt vhdl -sim lvds_bist_top.ncd lvds_bist_top_timesim.vhd
xst -ise "E:/ISEworks/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -ifn "E:/ISEworks/LVDS/LVDS_4to1/lvds_bist_top.xst" -ofn "E:/ISEworks/LVDS/LVDS_4to1/lvds_bist_top.syr"
ngdbuild -ise "E:/ISEworks/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -dd _ngo  -nt timestamp -i -p xc5vsx50t-ff1136-1 "lvds_bist_top.ngc" lvds_bist_top.ngd
map -ise "E:/ISEworks/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -p xc5vsx50t-ff1136-1 -w -logic_opt off -ol high -t 1 -cm area -pr o -k 6 -lc off -power off -o lvds_bist_top_map.ncd lvds_bist_top.ngd lvds_bist_top.pcf
par -ise "E:/ISEworks/LVDS/LVDS_4to1/xapp860.ise" -w -intstyle ise -ol std -t 1 lvds_bist_top_map.ncd lvds_bist_top.ncd lvds_bist_top.pcf
trce -ise "E:/ISEworks/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -v 3 -s 1 -xml lvds_bist_top lvds_bist_top.ncd -o lvds_bist_top.twr lvds_bist_top.pcf -ucf lvds_bist_top.ucf
netgen -ise "E:/ISEworks/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -s 1  -pcf lvds_bist_top.pcf -rpw 100 -tpw 0 -ar Structure -tm lvds_bist_top -insert_pp_buffers false -w -dir netgen/par -ofmt vhdl -sim lvds_bist_top.ncd lvds_bist_top_timesim.vhd
xst -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -ifn "H:/Gbit_fpga/LVDS/LVDS_4to1/lvds_bist_top.xst" -ofn "H:/Gbit_fpga/LVDS/LVDS_4to1/lvds_bist_top.syr"
xst -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -ifn "H:/Gbit_fpga/LVDS/LVDS_4to1/lvds_bist_top.xst" -ofn "H:/Gbit_fpga/LVDS/LVDS_4to1/lvds_bist_top.syr"
xst -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -ifn "H:/Gbit_fpga/LVDS/LVDS_4to1/lvds_bist_top.xst" -ofn "H:/Gbit_fpga/LVDS/LVDS_4to1/lvds_bist_top.syr"
xst -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -ifn "H:/Gbit_fpga/LVDS/LVDS_4to1/lvds_bist_top.xst" -ofn "H:/Gbit_fpga/LVDS/LVDS_4to1/lvds_bist_top.syr"
ngdbuild -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -dd _ngo  -nt timestamp -i -p xc5vsx50t-ff1136-1 "lvds_bist_top.ngc" lvds_bist_top.ngd
map -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -p xc5vsx50t-ff1136-1 -w -logic_opt off -ol high -t 1 -cm area -pr o -k 6 -lc off -power off -o lvds_bist_top_map.ncd lvds_bist_top.ngd lvds_bist_top.pcf
xst -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -ifn "H:/Gbit_fpga/LVDS/LVDS_4to1/lvds_bist_top.xst" -ofn "H:/Gbit_fpga/LVDS/LVDS_4to1/lvds_bist_top.syr"
ngdbuild -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -dd _ngo  -nt timestamp -i -p xc5vfx100t-ff1738-1 "lvds_bist_top.ngc" lvds_bist_top.ngd
map -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -p xc5vfx100t-ff1738-1 -w -logic_opt off -ol high -t 1 -cm area -pr o -k 6 -lc off -power off -o lvds_bist_top_map.ncd lvds_bist_top.ngd lvds_bist_top.pcf
par -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -w -intstyle ise -ol std -t 1 lvds_bist_top_map.ncd lvds_bist_top.ncd lvds_bist_top.pcf
trce -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -v 3 -s 1 -xml lvds_bist_top lvds_bist_top.ncd -o lvds_bist_top.twr lvds_bist_top.pcf -ucf lvds_tx_rx_merge.ucf
netgen -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -s 1  -pcf lvds_bist_top.pcf -rpw 100 -tpw 0 -ar Structure -tm lvds_bist_top -insert_pp_buffers false -w -dir netgen/par -ofmt vhdl -sim lvds_bist_top.ncd lvds_bist_top_timesim.vhd
xst -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -ifn "H:/Gbit_fpga/LVDS/LVDS_4to1/lvds_bist_top.xst" -ofn "H:/Gbit_fpga/LVDS/LVDS_4to1/lvds_bist_top.syr"
ngdbuild -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -dd _ngo  -nt timestamp -i -p xc5vfx100t-ff1738-1 "lvds_bist_top.ngc" lvds_bist_top.ngd
map -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -p xc5vfx100t-ff1738-1 -w -logic_opt off -ol high -t 1 -cm area -pr o -k 6 -lc off -power off -o lvds_bist_top_map.ncd lvds_bist_top.ngd lvds_bist_top.pcf
par -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -w -intstyle ise -ol std -t 1 lvds_bist_top_map.ncd lvds_bist_top.ncd lvds_bist_top.pcf
trce -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -v 3 -s 1 -xml lvds_bist_top lvds_bist_top.ncd -o lvds_bist_top.twr lvds_bist_top.pcf -ucf lvds_tx_rx_merge.ucf
netgen -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -s 1  -pcf lvds_bist_top.pcf -rpw 100 -tpw 0 -ar Structure -tm lvds_bist_top -insert_pp_buffers false -w -dir netgen/par -ofmt vhdl -sim lvds_bist_top.ncd lvds_bist_top_timesim.vhd
xst -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -ifn "H:/Gbit_fpga/LVDS/LVDS_4to1/lvds_bist_top.xst" -ofn "H:/Gbit_fpga/LVDS/LVDS_4to1/lvds_bist_top.syr"
xst -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -ifn "H:/Gbit_fpga/LVDS/LVDS_4to1/lvds_bist_top.xst" -ofn "H:/Gbit_fpga/LVDS/LVDS_4to1/lvds_bist_top.syr"
xst -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -ifn "H:/Gbit_fpga/LVDS/LVDS_4to1/lvds_bist_top.xst" -ofn "H:/Gbit_fpga/LVDS/LVDS_4to1/lvds_bist_top.syr"
ngdbuild -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -dd _ngo  -nt timestamp -i -p xc5vfx100t-ff1738-1 "lvds_bist_top.ngc" lvds_bist_top.ngd
map -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -p xc5vfx100t-ff1738-1 -w -logic_opt off -ol high -t 1 -cm area -pr o -k 6 -lc off -power off -o lvds_bist_top_map.ncd lvds_bist_top.ngd lvds_bist_top.pcf
par -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -w -intstyle ise -ol std -t 1 lvds_bist_top_map.ncd lvds_bist_top.ncd lvds_bist_top.pcf
trce -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -v 3 -s 1 -xml lvds_bist_top lvds_bist_top.ncd -o lvds_bist_top.twr lvds_bist_top.pcf -ucf lvds_bist_top.ucf
netgen -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -s 1  -pcf lvds_bist_top.pcf -rpw 100 -tpw 0 -ar Structure -tm lvds_bist_top -insert_pp_buffers false -w -dir netgen/par -ofmt vhdl -sim lvds_bist_top.ncd lvds_bist_top_timesim.vhd
xst -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -ifn "H:/Gbit_fpga/LVDS/LVDS_4to1/lvds_bist_top.xst" -ofn "H:/Gbit_fpga/LVDS/LVDS_4to1/lvds_bist_top.syr"
ngdbuild -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -dd _ngo  -nt timestamp -i -p xc5vfx100t-ff1738-1 "lvds_bist_top.ngc" lvds_bist_top.ngd
map -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -p xc5vfx100t-ff1738-1 -w -logic_opt off -ol high -t 1 -cm area -pr o -k 6 -lc off -power off -o lvds_bist_top_map.ncd lvds_bist_top.ngd lvds_bist_top.pcf
par -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -w -intstyle ise -ol std -t 1 lvds_bist_top_map.ncd lvds_bist_top.ncd lvds_bist_top.pcf
trce -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -v 3 -s 1 -xml lvds_bist_top lvds_bist_top.ncd -o lvds_bist_top.twr lvds_bist_top.pcf -ucf lvds_bist_top.ucf
netgen -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -s 1  -pcf lvds_bist_top.pcf -rpw 100 -tpw 0 -ar Structure -tm lvds_bist_top -insert_pp_buffers false -w -dir netgen/par -ofmt vhdl -sim lvds_bist_top.ncd lvds_bist_top_timesim.vhd
xst -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -ifn "H:/Gbit_fpga/LVDS/LVDS_4to1/lvds_bist_top.xst" -ofn "H:/Gbit_fpga/LVDS/LVDS_4to1/lvds_bist_top.syr"
ngdbuild -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -dd _ngo  -nt timestamp -i -p xc5vfx100t-ff1738-1 "lvds_bist_top.ngc" lvds_bist_top.ngd
map -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -p xc5vfx100t-ff1738-1 -w -logic_opt off -ol high -t 1 -cm area -pr o -k 6 -lc off -power off -o lvds_bist_top_map.ncd lvds_bist_top.ngd lvds_bist_top.pcf
map -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -p xc5vfx100t-ff1738-1 -w -logic_opt off -ol high -t 1 -cm area -pr o -k 6 -lc off -power off -o lvds_bist_top_map.ncd lvds_bist_top.ngd lvds_bist_top.pcf
ngdbuild -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -dd _ngo  -nt timestamp -i -p xc5vfx100t-ff1738-1 "lvds_bist_top.ngc" lvds_bist_top.ngd
map -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -p xc5vfx100t-ff1738-1 -w -logic_opt off -ol high -t 1 -cm area -pr o -k 6 -lc off -power off -o lvds_bist_top_map.ncd lvds_bist_top.ngd lvds_bist_top.pcf
par -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -w -intstyle ise -ol std -t 1 lvds_bist_top_map.ncd lvds_bist_top.ncd lvds_bist_top.pcf
trce -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -v 3 -s 1 -xml lvds_bist_top lvds_bist_top.ncd -o lvds_bist_top.twr lvds_bist_top.pcf -ucf lvds_tx_rx_merge.ucf
bitgen -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -f lvds_bist_top.ut lvds_bist_top.ncd
netgen -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -s 1  -pcf lvds_bist_top.pcf -rpw 100 -tpw 0 -ar Structure -tm lvds_bist_top -insert_pp_buffers false -w -dir netgen/par -ofmt vhdl -sim lvds_bist_top.ncd lvds_bist_top_timesim.vhd
xst -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -ifn "H:/Gbit_fpga/LVDS/LVDS_4to1/lvds_bist_top.xst" -ofn "H:/Gbit_fpga/LVDS/LVDS_4to1/lvds_bist_top.syr"
xst -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -ifn "H:/Gbit_fpga/LVDS/LVDS_4to1/lvds_bist_top.xst" -ofn "H:/Gbit_fpga/LVDS/LVDS_4to1/lvds_bist_top.syr"
ngdbuild -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -dd _ngo  -nt timestamp -i -p xc5vfx100t-ff1738-1 "lvds_bist_top.ngc" lvds_bist_top.ngd
map -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -p xc5vfx100t-ff1738-1 -w -logic_opt off -ol high -t 1 -cm area -pr o -k 6 -lc off -power off -o lvds_bist_top_map.ncd lvds_bist_top.ngd lvds_bist_top.pcf
par -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -w -intstyle ise -ol std -t 1 lvds_bist_top_map.ncd lvds_bist_top.ncd lvds_bist_top.pcf
trce -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -v 3 -s 1 -xml lvds_bist_top lvds_bist_top.ncd -o lvds_bist_top.twr lvds_bist_top.pcf -ucf lvds_bist_top.ucf
netgen -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -s 1  -pcf lvds_bist_top.pcf -rpw 100 -tpw 0 -ar Structure -tm lvds_bist_top -insert_pp_buffers false -w -dir netgen/par -ofmt vhdl -sim lvds_bist_top.ncd lvds_bist_top_timesim.vhd
bitgen -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -f lvds_bist_top.ut lvds_bist_top.ncd
xst -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -ifn "H:/Gbit_fpga/LVDS/LVDS_4to1/lvds_bist_top.xst" -ofn "H:/Gbit_fpga/LVDS/LVDS_4to1/lvds_bist_top.syr"
ngdbuild -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -dd _ngo  -nt timestamp -i -p xc5vfx100t-ff1738-1 "lvds_bist_top.ngc" lvds_bist_top.ngd
map -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -p xc5vfx100t-ff1738-1 -w -logic_opt off -ol high -t 1 -cm area -pr o -k 6 -lc off -power off -o lvds_bist_top_map.ncd lvds_bist_top.ngd lvds_bist_top.pcf
par -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -w -intstyle ise -ol std -t 1 lvds_bist_top_map.ncd lvds_bist_top.ncd lvds_bist_top.pcf
par -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -w -intstyle ise -ol std -t 1 lvds_bist_top_map.ncd lvds_bist_top.ncd lvds_bist_top.pcf
trce -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -v 3 -s 1 -xml lvds_bist_top lvds_bist_top.ncd -o lvds_bist_top.twr lvds_bist_top.pcf -ucf lvds_bist_top.ucf
bitgen -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -f lvds_bist_top.ut lvds_bist_top.ncd
netgen -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -s 1  -pcf lvds_bist_top.pcf -rpw 100 -tpw 0 -ar Structure -tm lvds_bist_top -insert_pp_buffers false -w -dir netgen/par -ofmt vhdl -sim lvds_bist_top.ncd lvds_bist_top_timesim.vhd
xst -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -ifn "H:/Gbit_fpga/LVDS/LVDS_4to1/lvds_bist_top.xst" -ofn "H:/Gbit_fpga/LVDS/LVDS_4to1/lvds_bist_top.syr"
xst -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -ifn "H:/Gbit_fpga/LVDS/LVDS_4to1/lvds_bist_top.xst" -ofn "H:/Gbit_fpga/LVDS/LVDS_4to1/lvds_bist_top.syr"
ngdbuild -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -dd _ngo  -nt timestamp -i -p xc5vfx100t-ff1738-1 "lvds_bist_top.ngc" lvds_bist_top.ngd
map -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -p xc5vfx100t-ff1738-1 -w -logic_opt off -ol high -t 1 -cm area -pr o -k 6 -lc off -power off -o lvds_bist_top_map.ncd lvds_bist_top.ngd lvds_bist_top.pcf
ngdbuild -ise "H:/Gbit_fpga/LVDS/LVDS_4to1/xapp860.ise" -intstyle ise -dd _ngo  -nt timestamp -i -p xc5vfx100t-ff1738-1 "lvds_bist_top.ngc" lvds_bist_top.ngd