lvds_bist_top.syr

来自「FPGA之间的LVDS传输」· SYR 代码 · 共 588 行 · 第 1/5 页

SYR
588 行
字号
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Entity <lvds_tx_rx_merge> analyzed. Unit <lvds_tx_rx_merge> generated.Analyzing Entity <DDR_6TO1_16CHAN_RT_RX> in library <work> (Architecture <translated>).WARNING:Xst:753 - "E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/DDR_6TO1_16CHAN_RT_RX.vhd" line 419: Unconnected output port 'almost_full' of component 'fifo_rx'.WARNING:Xst:753 - "E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/DDR_6TO1_16CHAN_RT_RX.vhd" line 419: Unconnected output port 'empty' of component 'fifo_rx'.WARNING:Xst:753 - "E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/DDR_6TO1_16CHAN_RT_RX.vhd" line 419: Unconnected output port 'full' of component 'fifo_rx'.WARNING:Xst:2211 - "E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/DDR_6TO1_16CHAN_RT_RX.vhd" line 419: Instantiating black box module <fifo_rx>.    Set user-defined property "CAPACITANCE =  DONT_CARE" for instance <SOURCE_SYNC_CLOCK_IN> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "DIFF_TERM =  TRUE" for instance <SOURCE_SYNC_CLOCK_IN> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IBUF_DELAY_VALUE =  0" for instance <SOURCE_SYNC_CLOCK_IN> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IFD_DELAY_VALUE =  AUTO" for instance <SOURCE_SYNC_CLOCK_IN> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IOSTANDARD =  LVDS_25" for instance <SOURCE_SYNC_CLOCK_IN> in unit <DDR_6TO1_16CHAN_RT_RX>.WARNING:Xst:2211 - "E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/DDR_6TO1_16CHAN_RT_RX.vhd" line 453: Instantiating black box module <IODELAY>.    Set user-defined property "HIGH_PERFORMANCE_MODE =  TRUE" for instance <ISERDES_CLOCK_RX> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IDELAY_TYPE =  FIXED" for instance <ISERDES_CLOCK_RX> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IDELAY_VALUE =  0" for instance <ISERDES_CLOCK_RX> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "ODELAY_VALUE =  0" for instance <ISERDES_CLOCK_RX> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "REFCLK_FREQUENCY =  200.0000000000000000" for instance <ISERDES_CLOCK_RX> in unit <DDR_6TO1_16CHAN_RT_RX>.WARNING:Xst:753 - "E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/DDR_6TO1_16CHAN_RT_RX.vhd" line 640: Unconnected output port 'ALL_CHANNELS_ALIGNED' of component 'RESOURCE_SHARING_CONTROL'.    Set user-defined property "DIFF_TERM =  TRUE" for instance <RX_DATA_IN_00> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IOSTANDARD =  LVDS_25" for instance <RX_DATA_IN_00> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "DIFF_TERM =  TRUE" for instance <RX_DATA_IN_01> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IOSTANDARD =  LVDS_25" for instance <RX_DATA_IN_01> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "DIFF_TERM =  TRUE" for instance <RX_DATA_IN_02> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IOSTANDARD =  LVDS_25" for instance <RX_DATA_IN_02> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "DIFF_TERM =  TRUE" for instance <RX_DATA_IN_03> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IOSTANDARD =  LVDS_25" for instance <RX_DATA_IN_03> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "DIFF_TERM =  TRUE" for instance <RX_DATA_IN_04> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IOSTANDARD =  LVDS_25" for instance <RX_DATA_IN_04> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "DIFF_TERM =  TRUE" for instance <RX_DATA_IN_05> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IOSTANDARD =  LVDS_25" for instance <RX_DATA_IN_05> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "DIFF_TERM =  TRUE" for instance <RX_DATA_IN_06> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IOSTANDARD =  LVDS_25" for instance <RX_DATA_IN_06> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "DIFF_TERM =  TRUE" for instance <RX_DATA_IN_07> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IOSTANDARD =  LVDS_25" for instance <RX_DATA_IN_07> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "DIFF_TERM =  TRUE" for instance <RX_DATA_IN_08> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IOSTANDARD =  LVDS_25" for instance <RX_DATA_IN_08> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "DIFF_TERM =  TRUE" for instance <RX_DATA_IN_09> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IOSTANDARD =  LVDS_25" for instance <RX_DATA_IN_09> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "DIFF_TERM =  TRUE" for instance <RX_DATA_IN_10> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IOSTANDARD =  LVDS_25" for instance <RX_DATA_IN_10> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "DIFF_TERM =  TRUE" for instance <RX_DATA_IN_11> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IOSTANDARD =  LVDS_25" for instance <RX_DATA_IN_11> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "DIFF_TERM =  TRUE" for instance <RX_DATA_IN_12> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IOSTANDARD =  LVDS_25" for instance <RX_DATA_IN_12> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "DIFF_TERM =  TRUE" for instance <RX_DATA_IN_13> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IOSTANDARD =  LVDS_25" for instance <RX_DATA_IN_13> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "DIFF_TERM =  TRUE" for instance <RX_DATA_IN_14> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IOSTANDARD =  LVDS_25" for instance <RX_DATA_IN_14> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "DIFF_TERM =  TRUE" for instance <RX_DATA_IN_15> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IOSTANDARD =  LVDS_25" for instance <RX_DATA_IN_15> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "DIFF_TERM =  TRUE" for instance <RX_CNTL> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IOSTANDARD =  LVDS_25" for instance <RX_CNTL> in unit <DDR_6TO1_16CHAN_RT_RX>.WARNING:Xst:2211 - "E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/DDR_6TO1_16CHAN_RT_RX.vhd" line 1217: Instantiating black box module <IODELAY>.    Set user-defined property "HIGH_PERFORMANCE_MODE =  TRUE" for instance <IODELAY_RX_DATA_00> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IDELAY_TYPE =  VARIABLE" for instance <IODELAY_RX_DATA_00> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IDELAY_VALUE =  0" for instance <IODELAY_RX_DATA_00> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "ODELAY_VALUE =  0" for instance <IODELAY_RX_DATA_00> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "REFCLK_FREQUENCY =  200.0000000000000000" for instance <IODELAY_RX_DATA_00> in unit <DDR_6TO1_16CHAN_RT_RX>.WARNING:Xst:2211 - "E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/DDR_6TO1_16CHAN_RT_RX.vhd" line 1239: Instantiating black box module <IODELAY>.    Set user-defined property "HIGH_PERFORMANCE_MODE =  TRUE" for instance <IODELAY_RX_DATA_01> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IDELAY_TYPE =  VARIABLE" for instance <IODELAY_RX_DATA_01> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IDELAY_VALUE =  0" for instance <IODELAY_RX_DATA_01> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "ODELAY_VALUE =  0" for instance <IODELAY_RX_DATA_01> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "REFCLK_FREQUENCY =  200.0000000000000000" for instance <IODELAY_RX_DATA_01> in unit <DDR_6TO1_16CHAN_RT_RX>.WARNING:Xst:2211 - "E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/DDR_6TO1_16CHAN_RT_RX.vhd" line 1261: Instantiating black box module <IODELAY>.    Set user-defined property "HIGH_PERFORMANCE_MODE =  TRUE" for instance <IODELAY_RX_DATA_02> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IDELAY_TYPE =  VARIABLE" for instance <IODELAY_RX_DATA_02> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IDELAY_VALUE =  0" for instance <IODELAY_RX_DATA_02> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "ODELAY_VALUE =  0" for instance <IODELAY_RX_DATA_02> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "REFCLK_FREQUENCY =  200.0000000000000000" for instance <IODELAY_RX_DATA_02> in unit <DDR_6TO1_16CHAN_RT_RX>.WARNING:Xst:2211 - "E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/DDR_6TO1_16CHAN_RT_RX.vhd" line 1283: Instantiating black box module <IODELAY>.    Set user-defined property "HIGH_PERFORMANCE_MODE =  TRUE" for instance <IODELAY_RX_DATA_03> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IDELAY_TYPE =  VARIABLE" for instance <IODELAY_RX_DATA_03> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IDELAY_VALUE =  0" for instance <IODELAY_RX_DATA_03> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "ODELAY_VALUE =  0" for instance <IODELAY_RX_DATA_03> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "REFCLK_FREQUENCY =  200.0000000000000000" for instance <IODELAY_RX_DATA_03> in unit <DDR_6TO1_16CHAN_RT_RX>.WARNING:Xst:2211 - "E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/DDR_6TO1_16CHAN_RT_RX.vhd" line 1306: Instantiating black box module <IODELAY>.    Set user-defined property "HIGH_PERFORMANCE_MODE =  TRUE" for instance <IODELAY_RX_DATA_04> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IDELAY_TYPE =  VARIABLE" for instance <IODELAY_RX_DATA_04> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IDELAY_VALUE =  0" for instance <IODELAY_RX_DATA_04> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "ODELAY_VALUE =  0" for instance <IODELAY_RX_DATA_04> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "REFCLK_FREQUENCY =  200.0000000000000000" for instance <IODELAY_RX_DATA_04> in unit <DDR_6TO1_16CHAN_RT_RX>.WARNING:Xst:2211 - "E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/DDR_6TO1_16CHAN_RT_RX.vhd" line 1328: Instantiating black box module <IODELAY>.    Set user-defined property "HIGH_PERFORMANCE_MODE =  TRUE" for instance <IODELAY_RX_DATA_05> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IDELAY_TYPE =  VARIABLE" for instance <IODELAY_RX_DATA_05> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IDELAY_VALUE =  0" for instance <IODELAY_RX_DATA_05> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "ODELAY_VALUE =  0" for instance <IODELAY_RX_DATA_05> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "REFCLK_FREQUENCY =  200.0000000000000000" for instance <IODELAY_RX_DATA_05> in unit <DDR_6TO1_16CHAN_RT_RX>.WARNING:Xst:2211 - "E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/DDR_6TO1_16CHAN_RT_RX.vhd" line 1350: Instantiating black box module <IODELAY>.    Set user-defined property "HIGH_PERFORMANCE_MODE =  TRUE" for instance <IODELAY_RX_DATA_06> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IDELAY_TYPE =  VARIABLE" for instance <IODELAY_RX_DATA_06> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IDELAY_VALUE =  0" for instance <IODELAY_RX_DATA_06> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "ODELAY_VALUE =  0" for instance <IODELAY_RX_DATA_06> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "REFCLK_FREQUENCY =  200.0000000000000000" for instance <IODELAY_RX_DATA_06> in unit <DDR_6TO1_16CHAN_RT_RX>.WARNING:Xst:2211 - "E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/DDR_6TO1_16CHAN_RT_RX.vhd" line 1372: Instantiating black box module <IODELAY>.    Set user-defined property "HIGH_PERFORMANCE_MODE =  TRUE" for instance <IODELAY_RX_DATA_07> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IDELAY_TYPE =  VARIABLE" for instance <IODELAY_RX_DATA_07> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IDELAY_VALUE =  0" for instance <IODELAY_RX_DATA_07> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "ODELAY_VALUE =  0" for instance <IODELAY_RX_DATA_07> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "REFCLK_FREQUENCY =  200.0000000000000000" for instance <IODELAY_RX_DATA_07> in unit <DDR_6TO1_16CHAN_RT_RX>.WARNING:Xst:2211 - "E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/DDR_6TO1_16CHAN_RT_RX.vhd" line 1394: Instantiating black box module <IODELAY>.    Set user-defined property "HIGH_PERFORMANCE_MODE =  TRUE" for instance <IODELAY_RX_DATA_08> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IDELAY_TYPE =  VARIABLE" for instance <IODELAY_RX_DATA_08> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IDELAY_VALUE =  0" for instance <IODELAY_RX_DATA_08> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "ODELAY_VALUE =  0" for instance <IODELAY_RX_DATA_08> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "REFCLK_FREQUENCY =  200.0000000000000000" for instance <IODELAY_RX_DATA_08> in unit <DDR_6TO1_16CHAN_RT_RX>.WARNING:Xst:2211 - "E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/DDR_6TO1_16CHAN_RT_RX.vhd" line 1416: Instantiating black box module <IODELAY>.    Set user-defined property "HIGH_PERFORMANCE_MODE =  TRUE" for instance <IODELAY_RX_DATA_09> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IDELAY_TYPE =  VARIABLE" for instance <IODELAY_RX_DATA_09> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IDELAY_VALUE =  0" for instance <IODELAY_RX_DATA_09> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "ODELAY_VALUE =  0" for instance <IODELAY_RX_DATA_09> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "REFCLK_FREQUENCY =  200.0000000000000000" for instance <IODELAY_RX_DATA_09> in unit <DDR_6TO1_16CHAN_RT_RX>.WARNING:Xst:2211 - "E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/DDR_6TO1_16CHAN_RT_RX.vhd" line 1438: Instantiating black box module <IODELAY>.    Set user-defined property "HIGH_PERFORMANCE_MODE =  TRUE" for instance <IODELAY_RX_DATA_10> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IDELAY_TYPE =  VARIABLE" for instance <IODELAY_RX_DATA_10> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "IDELAY_VALUE =  0" for instance <IODELAY_RX_DATA_10> in unit <DDR_6TO1_16CHAN_RT_RX>.    Set user-defined property "ODELAY_VALUE =  0" for instance <IODELAY_RX_DATA_10> in unit <DDR_6TO1_16CHAN_RT_RX>.
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lvds_bist_top.syr - 源码说明

本页面展示了「FPGA之间的LVDS传输」中的 lvds_bist_top.syr 源码文件，采用 SYR 编程语言编写，共 588 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。

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