hdpdeps.ref

FPGA之间的LVDS传输

V3 192
FL E:/ISEworks/LVDS/LVDS-func/BIT_ALIGN_MACHINE.vhd 2006/09/19.08:58:44 K.37
FL E:/ISEworks/LVDS/LVDS-func/count_to_128.vhd 2006/08/15.15:03:10 K.37
FL E:/ISEworks/LVDS/LVDS-func/count_to_16x.vhd 2006/09/07.11:12:44 K.37
FL E:/ISEworks/LVDS/LVDS-func/COUNT_TO_64.vhd 2006/09/07.11:00:34 K.37
FL E:/ISEworks/LVDS/LVDS-func/DDR_6TO1_16CHAN_RT_RX.vhd 2008/08/20.12:37:23 K.37
FL E:/ISEworks/LVDS/LVDS-func/DDR_6TO1_16CHAN_RT_TX.vhd 2006/09/19.08:58:20 K.37
FL E:/ISEworks/LVDS/LVDS-func/lvds_tx_rx_merge.vhd 2008/08/20.16:14:51 K.37
FL E:/ISEworks/LVDS/LVDS-func/RESOURCE_SHARING_CONTROL.vhd 2006/09/19.08:58:06 K.37
FL E:/ISEworks/LVDS/LVDS-func/RT_WINDOW_MONITOR.vhd 2006/09/19.08:59:34 K.37
FL E:/ISEworks/LVDS/LVDS-func/seven_bit_reg_w_ce.vhd 2006/07/25.23:19:48 K.37
FL E:/ISEworks/LVDS/LVDS-func/uut_tx_wrapper.vhd 2008/08/20.15:29:21 K.37
EN work/uut_tx_wrapper 1219217447 \
      FL E:/ISEworks/LVDS/LVDS-func/uut_tx_wrapper.vhd PB ieee/std_logic_1164 1209777529 \
      PB ieee/std_logic_arith 1209777530 PB ieee/STD_LOGIC_UNSIGNED 1209777531 \
      LB unisim PH unisim/VCOMPONENTS 1212040723
AR work/uut_tx_wrapper/translated 1219217448 \
      FL E:/ISEworks/LVDS/LVDS-func/uut_tx_wrapper.vhd EN work/uut_tx_wrapper 1219217447 \
      CP DDR_6TO1_16CHAN_RT_TX
FL E:/ISEworks/LVDS/LVDS_4to1/BIT_ALIGN_MACHINE.vhd 2008/08/21.17:16:08 K.37
FL E:/ISEworks/LVDS/LVDS_4to1/count_to_128.vhd 2006/08/15.15:03:10 K.37
FL E:/ISEworks/LVDS/LVDS_4to1/count_to_16x.vhd 2008/08/22.15:42:16 K.37
FL E:/ISEworks/LVDS/LVDS_4to1/COUNT_TO_64.vhd 2008/08/21.16:18:30 K.37
FL E:/ISEworks/LVDS/LVDS_4to1/DDR_6TO1_16CHAN_RT_RX.vhd 2008/08/25.17:09:29 K.37
FL E:/ISEworks/LVDS/LVDS_4to1/DDR_6TO1_16CHAN_RT_TX.vhd 2008/08/25.17:07:56 K.37
FL E:/ISEworks/LVDS/LVDS_4to1/fifo_rx.vhd 2008/08/23.15:57:02 K.37
FL E:/ISEworks/LVDS/LVDS_4to1/fifo_tx.vhd 2008/08/23.15:53:54 K.37
FL E:/ISEworks/LVDS/LVDS_4to1/lvds_bist_top.vhd 2008/08/25.21:39:10 K.37
FL E:/ISEworks/LVDS/LVDS_4to1/lvds_tx_rx_merge.vhd 2008/08/25.17:11:20 K.37
FL E:/ISEworks/LVDS/LVDS_4to1/RESOURCE_SHARING_CONTROL.vhd 2008/08/22.15:44:48 K.37
FL E:/ISEworks/LVDS/LVDS_4to1/RT_WINDOW_MONITOR.vhd 2008/08/21.16:18:18 K.37
FL E:/ISEworks/LVDS/LVDS_4to1/seven_bit_reg_w_ce.vhd 2008/08/21.16:18:06 K.37
FL E:/ISEworks/LVDS/xapp860/BIT_ALIGN_MACHINE.vhd 2006/09/19.08:58:44 K.37
FL E:/ISEworks/LVDS/xapp860/count_to_128.vhd 2006/08/15.15:03:10 K.37
FL E:/ISEworks/LVDS/xapp860/count_to_16x.vhd 2006/09/07.11:12:44 K.37
FL E:/ISEworks/LVDS/xapp860/COUNT_TO_64.vhd 2006/09/07.11:00:34 K.37
FL E:/ISEworks/LVDS/xapp860/DDR_6TO1_16CHAN_RT_RX.vhd 2008/08/20.12:32:50 K.37
FL E:/ISEworks/LVDS/xapp860/DDR_6TO1_16CHAN_RT_RX2.vhd 2008/08/19.23:20:54 K.37
FL E:/ISEworks/LVDS/xapp860/DDR_6TO1_16CHAN_RT_TX.vhd 2006/09/19.08:58:20 K.37
FL E:/ISEworks/LVDS/xapp860/RESOURCE_SHARING_CONTROL.vhd 2006/09/19.08:58:06 K.37
FL E:/ISEworks/LVDS/xapp860/RT_WINDOW_MONITOR.vhd 2006/09/19.08:59:34 K.37
FL E:/ISEworks/LVDS/xapp860/seven_bit_reg_w_ce.vhd 2006/07/25.23:19:48 K.37
FL E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/BIT_ALIGN_MACHINE.vhd 2008/08/21.17:16:10 K.37
EN work/BIT_ALIGN_MACHINE 1231683561 \
      FL E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/BIT_ALIGN_MACHINE.vhd \
      PB ieee/std_logic_1164 1209777529 PB ieee/std_logic_arith 1209777530 \
      PB ieee/STD_LOGIC_UNSIGNED 1209777531 LB unisim PH unisim/VCOMPONENTS 1212040723
AR work/BIT_ALIGN_MACHINE/translated 1231683562 \
      FL E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/BIT_ALIGN_MACHINE.vhd \
      EN work/BIT_ALIGN_MACHINE 1231683561 CP count_to_128 CP seven_bit_reg_w_ce \
      CP FDR CP FDRE
FL E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/count_to_128.vhd 2006/08/15.15:03:10 K.37
EN work/count_to_128 1231683549 \
      FL E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/count_to_128.vhd \
      PB ieee/std_logic_1164 1209777529 PB ieee/std_logic_arith 1209777530 \
      PB ieee/STD_LOGIC_UNSIGNED 1209777531
AR work/count_to_128/translated 1231683550 \
      FL E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/count_to_128.vhd \
      EN work/count_to_128 1231683549
FL E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/count_to_16x.vhd 2008/08/22.15:42:18 K.37
EN work/count_to_16x 1231683553 \
      FL E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/count_to_16x.vhd \
      PB ieee/std_logic_1164 1209777529 PB ieee/std_logic_arith 1209777530 \
      PB ieee/STD_LOGIC_UNSIGNED 1209777531 LB unisim PH unisim/VCOMPONENTS 1212040723
AR work/count_to_16x/translated 1231683554 \
      FL E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/count_to_16x.vhd \
      EN work/count_to_16x 1231683553
FL E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/COUNT_TO_64.vhd 2008/08/21.16:18:32 K.37
EN work/COUNT_TO_64 1231683565 \
      FL E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/COUNT_TO_64.vhd \
      PB ieee/std_logic_1164 1209777529 PB ieee/std_logic_arith 1209777530 \
      PB ieee/STD_LOGIC_UNSIGNED 1209777531 LB unisim PH unisim/VCOMPONENTS 1212040723
AR work/COUNT_TO_64/translated 1231683566 \
      FL E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/COUNT_TO_64.vhd \
      EN work/COUNT_TO_64 1231683565
FL E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/DDR_6TO1_16CHAN_RT_RX.vhd 2008/12/03.17:14:43 K.37
EN work/DDR_6TO1_16CHAN_RT_RX 1231683567 \
      FL E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/DDR_6TO1_16CHAN_RT_RX.vhd \
      PB ieee/std_logic_1164 1209777529 PB ieee/std_logic_arith 1209777530 \
      PB ieee/STD_LOGIC_UNSIGNED 1209777531 LB unisim PH unisim/VCOMPONENTS 1212040723
AR work/DDR_6TO1_16CHAN_RT_RX/translated 1231683568 \
      FL E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/DDR_6TO1_16CHAN_RT_RX.vhd \
      EN work/DDR_6TO1_16CHAN_RT_RX 1231683567 CP fifo_rx CP IDELAYCTRL CP IBUFDS \
      CP IODELAY CP BUFIO CP RESOURCE_SHARING_CONTROL CP BIT_ALIGN_MACHINE \
      CP RT_WINDOW_MONITOR CP COUNT_TO_64 CP IBUFDS_DIFF_OUT CP ISERDES_NODELAY
FL E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/DDR_6TO1_16CHAN_RT_TX.vhd 2008/12/03.17:18:13 K.37
EN work/DDR_6TO1_16CHAN_RT_TX 1231683569 \
      FL E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/DDR_6TO1_16CHAN_RT_TX.vhd \
      PB ieee/std_logic_1164 1209777529 PB ieee/std_logic_arith 1209777530 \
      PB ieee/STD_LOGIC_UNSIGNED 1209777531 LB unisim PH unisim/VCOMPONENTS 1212040723
AR work/DDR_6TO1_16CHAN_RT_TX/translated 1231683570 \
      FL E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/DDR_6TO1_16CHAN_RT_TX.vhd \
      EN work/DDR_6TO1_16CHAN_RT_TX 1231683569 CP fifo_tx CP ODDR \
      CP OBUFDS_LVDSEXT_25 CP OSERDES
FL E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/fifo_rx.vhd 2008/12/03.17:11:45 K.37
EN work/fifo_rx 1231683557 \
      FL E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/fifo_rx.vhd \
      PB ieee/std_logic_1164 1209777529
AR work/fifo_rx/fifo_rx_a 1231683558 \
      FL E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/fifo_rx.vhd \
      EN work/fifo_rx 1231683557
FL E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/fifo_tx.vhd 2008/12/03.17:11:47 K.37
EN work/fifo_tx 1231683555 \
      FL E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/fifo_tx.vhd \
      PB ieee/std_logic_1164 1209777529
AR work/fifo_tx/fifo_tx_a 1231683556 \
      FL E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/fifo_tx.vhd \
      EN work/fifo_tx 1231683555
FL E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/lvds_bist_top.vhd 2008/12/03.17:11:43 K.37
EN work/lvds_bist_top 1231683575 \
      FL E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/lvds_bist_top.vhd \
      PB ieee/std_logic_1164 1209777529 PB ieee/std_logic_arith 1209777530 \
      PB ieee/STD_LOGIC_UNSIGNED 1209777531 LB unisim PH unisim/VCOMPONENTS 1212040723
AR work/lvds_bist_top/Behavioral 1231683576 \
      FL E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/lvds_bist_top.vhd \
      EN work/lvds_bist_top 1231683575 CP lvds_dcm CP lvds_tx_rx_merge \
      CP synth_tb_lvds
FL E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/lvds_dcm.vhd 2008/11/08.14:01:28 K.37
EN work/lvds_dcm 1231683571 \
      FL E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/lvds_dcm.vhd \
      PB ieee/std_logic_1164 1209777529 PH ieee/NUMERIC_STD 1209777529 LB unisim \
      PH unisim/VCOMPONENTS 1212040723