lvds_bist_top_tb_wave.fdo

FPGA之间的LVDS传输

## Project Navigator simulation template: lvds_bist_top_tb_wave.fdo
## You may edit this file to control your simulation.
add wave *
add wave /glbl/GSR
add wave sim:/lvds_bist_top_tb/uut/u_tb/check_data_error
add wave sim:/lvds_bist_top_tb/uut/u_tb/Data_bus_rx_reg_i
add wave sim:/lvds_bist_top_tb/uut/u_tb/Data_bus_rx_check_i
add wave sim:/lvds_bist_top_tb/uut/u_lvds/tap_clk
add wave sim:/lvds_bist_top_tb/uut/u_lvds/tap_16
add wave sim:/lvds_bist_top_tb/uut/u_lvds/tap_15
add wave sim:/lvds_bist_top_tb/uut/u_lvds/tap_14
add wave sim:/lvds_bist_top_tb/uut/u_lvds/tap_13
add wave sim:/lvds_bist_top_tb/uut/u_lvds/tap_12
add wave sim:/lvds_bist_top_tb/uut/u_lvds/tap_11
add wave sim:/lvds_bist_top_tb/uut/u_lvds/tap_10
add wave sim:/lvds_bist_top_tb/uut/u_lvds/tap_09
add wave sim:/lvds_bist_top_tb/uut/u_lvds/tap_08
add wave sim:/lvds_bist_top_tb/uut/u_lvds/tap_07
add wave sim:/lvds_bist_top_tb/uut/u_lvds/tap_06
add wave sim:/lvds_bist_top_tb/uut/u_lvds/tap_05
add wave sim:/lvds_bist_top_tb/uut/u_lvds/tap_04
add wave sim:/lvds_bist_top_tb/uut/u_lvds/tap_03
add wave sim:/lvds_bist_top_tb/uut/u_lvds/tap_02
add wave sim:/lvds_bist_top_tb/uut/u_lvds/tap_01
add wave sim:/lvds_bist_top_tb/uut/u_lvds/tap_00
add wave sim:/lvds_bist_top_tb/uut/u_lvds/uut_rx/bit_align_machine_0/current_state
add wave sim:/lvds_bist_top_tb/uut/u_tb/Data_bus_rx_reg

log -r /*