ddr_6to1_16chan_rt_rx_fpga_editor.out

FPGA之间的LVDS传输

#:C69    
#Xilinx FPGA Editor Command Log File
#Editor Version:
#:V   NT M2.1 K.37
#Current Working Directory:
#:D   E:\ISEworks\LVDS\xapp860
#Date/Time:
#:T   Tue Aug 19 14:53:41 2008
#------------------------------
	#Reading E:/ISEworks/LVDS/xapp860/DDR_6TO1_16CHAN_RT_RX.ncd...
	#Loading device for application Rf_Device from file '5vsx50t.nph' in environment K:\Xilinx\10.1\ISE.
	#   "DDR_6TO1_16CHAN_RT_RX" is an NCD, version 3.2, device xc5vsx50t, package ff1136, speed -1
	#Building chip graphics...
	#Loading speed info...
	#1
setattr main edit-mode no-logic-changes
	#2
select -k net 'RXCLK_OBUF'
	#3
unselect net 'RXCLK_OBUF'
	#4
select -k net 'RXCLKDIV_OBUF'
	#5
unselect net 'RXCLKDIV_OBUF'
	#6
select -k net 'RXCLK_OBUF'
	#7
unselect -all
	#8
select comp 'ISERDES_RX_DATA_04'
	#comp "ISERDES_RX_DATA_04",  site "ILOGIC_X0Y51",  type = ISERDES  (RPM grid X2Y51)
	#9
unselect -all
	#10
select comp 'ISERDES_RX_DATA_04'
	#comp "ISERDES_RX_DATA_04",  site "ILOGIC_X0Y51",  type = ISERDES  (RPM grid X2Y51)
	#11
post block
	#<ISERDES>; bel <ISERDES_RX_DATA_04>.
	#12
unselect comp 'ISERDES_RX_DATA_04'
	#13
select -k net 'RXCLK_OBUF'
	#14
unselect net 'RXCLK_OBUF'
	#15
select -k net 'RXCLKDIV_OBUF'
	#16
unselect net 'RXCLKDIV_OBUF'
	#17
select -k net 'RXCLK_OBUF'
	#18
unselect net 'RXCLK_OBUF'
	#19
select -k net 'RXCLKDIV_OBUF'
	#20
unselect net 'RXCLKDIV_OBUF'
	#21
select -k net 'RXCLK_OBUF'
	#22
unselect -all
	#23
select comp 'RXCLK'
	#comp "RXCLK",  site "AJ30",  bonded type = IOB,  pad name = IOB_X0Y43,  pin name = AJ30  (RPM grid X1Y43)
	#24
unselect -all
	#25
select comp 'RXCLK'
	#comp "RXCLK",  site "AJ30",  bonded type = IOB,  pad name = IOB_X0Y43,  pin name = AJ30  (RPM grid X1Y43)
	#26
unselect -all
	#27
select comp 'RXCLK'
	#comp "RXCLK",  site "AJ30",  bonded type = IOB,  pad name = IOB_X0Y43,  pin name = AJ30  (RPM grid X1Y43)
	#28
post block
	#29
unselect -all
	#30
unselect -all
	#31
select wire 'PADINPUT(-114936,-125064)'
	#node = PADINPUT(-114936,-125064)
	#32
unselect -all
	#33
select net 'RXCLK_OBUF'
	#net "RXCLK_OBUF"
	#34
unselect net 'RXCLK_OBUF'
	#35
select -k net 'RXCLKDIV_OBUF'
	#36
unselect -all
	#37
unselect -all
	#38
select net 'RXCLK_OBUF'
	#net "RXCLK_OBUF"
	#39
unselect net 'RXCLK_OBUF'
	#40
select -k net 'RXCLKDIV_OBUF'
	#41
unselect net 'RXCLKDIV_OBUF'
	#42
select -k net 'RXCLK_OBUF'
	#43
unselect net 'RXCLK_OBUF'
	#44
select -k net 'RXCLKDIV_OBUF'
	#45
unselect net 'RXCLKDIV_OBUF'
	#46
select -k net 'RXCLK_OBUF'
	#47
unselect net 'RXCLK_OBUF'
	#48
select -k net 'RXCLKDIV_OBUF'
	#49
unselect -all
	#50
unselect -all
	#51
unselect -all
	#52
select wire 'PADOUTPUT(-114936,-125016)'
	#node = PADOUTPUT(-114936,-125016)
	#53
unselect wire 'PADOUTPUT(-114936,-125016)'
	#54
select -k net 'RXCLKDIV_OBUF'
	#55
unselect net 'RXCLKDIV_OBUF'
	#56
select -k net 'RXCLK_OBUF'
	#57
unselect net 'RXCLK_OBUF'
	#58
select -k net 'RXCLKDIV_OBUF'
	#59
unselect net 'RXCLKDIV_OBUF'
	#60
select -k net 'RXCLK_OBUF'
	#61
unselect net 'RXCLK_OBUF'
	#62
select -k net 'RXCLKDIV_OBUF'
	#63
unselect net 'RXCLKDIV_OBUF'
	#64
select -k net 'RXCLK_OBUF'
	#65
unselect net 'RXCLK_OBUF'
	#66
select -k net 'RXCLKDIV_OBUF'
	#67
unselect net 'RXCLKDIV_OBUF'
	#68
select -k net 'RXCLK_OBUF'
	#69
unselect net 'RXCLK_OBUF'
	#70
select -k net 'RXCLKDIV_OBUF'