ddr_6to1_16chan_rt_tx.twr

FPGA之间的LVDS传输

--------------------------------------------------------------------------------
Release 10.1.02 Trace  (nt)
Copyright (c) 1995-2008 Xilinx, Inc.  All rights reserved.

K:\Xilinx\10.1\ISE\bin\nt\unwrapped\trce.exe -ise
E:/ISEworks/LVDS/xapp860/xapp860.ise -intstyle ise -v 3 -s 1 -xml
DDR_6TO1_16CHAN_RT_TX DDR_6TO1_16CHAN_RT_TX.ncd -o DDR_6TO1_16CHAN_RT_TX.twr
DDR_6TO1_16CHAN_RT_TX.pcf

Design file:              DDR_6TO1_16CHAN_RT_TX.ncd
Physical constraint file: DDR_6TO1_16CHAN_RT_TX.pcf
Device,package,speed:     xc5vsx50t,ff1136,-1 (PRODUCTION 1.61 2008-05-28, STEPPING level 0)
Report level:             verbose report

Environment Variable      Effect 
--------------------      ------ 
NONE                      No environment variables were set
--------------------------------------------------------------------------------

INFO:Timing:2698 - No timing constraints found, doing default enumeration.
INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths 
   option. All paths that are not constrained will be reported in the 
   unconstrained paths section(s) of the report.
INFO:Timing:3339 - The clock-to-out numbers in this timing report are based on 
   a 50 Ohm transmission line loading model.  For the details of this model, 
   and for more information on accounting for different loading conditions, 
   please see the device datasheet.



Data Sheet report:
-----------------
All values displayed in nanoseconds (ns)

Setup/Hold to clock TXCLKDIV
-------------------+------------+------------+------------------+--------+
                   |  Setup to  |  Hold to   |                  | Clock  |
Source             | clk (edge) | clk (edge) |Internal Clock(s) | Phase  |
-------------------+------------+------------+------------------+--------+
DATA_TO_OSERDES<0> |    0.997(R)|    1.389(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<1> |    1.135(R)|    1.263(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<2> |    0.172(R)|    2.216(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<3> |    0.164(R)|    2.204(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<4> |    0.786(R)|    1.591(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<5> |    0.164(R)|    2.198(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<6> |    0.654(R)|    1.711(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<7> |    1.117(R)|    1.284(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<8> |    0.131(R)|    2.252(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<9> |    0.153(R)|    2.246(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<10>|    0.600(R)|    1.746(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<11>|   -0.002(R)|    2.361(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<12>|    0.660(R)|    1.669(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<13>|    0.803(R)|    1.535(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<14>|   -0.089(R)|    2.463(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<15>|    0.791(R)|    1.667(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<16>|    0.431(R)|    1.913(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<17>|    0.120(R)|    2.274(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<18>|    1.086(R)|    1.304(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<19>|    0.856(R)|    1.517(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<20>|    0.256(R)|    2.149(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<21>|    0.802(R)|    1.659(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<22>|    1.280(R)|    1.142(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<23>|   -0.073(R)|    2.442(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<24>|    1.352(R)|    1.043(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<25>|    0.429(R)|    1.893(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<26>|    0.242(R)|    2.150(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<27>|    0.175(R)|    2.201(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<28>|    0.444(R)|    1.911(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<29>|    0.354(R)|    2.044(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<30>|    0.647(R)|    1.697(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<31>|    0.758(R)|    1.593(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<32>|    0.160(R)|    2.231(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<33>|    0.131(R)|    2.267(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<34>|    0.698(R)|    1.664(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<35>|   -0.040(R)|    2.407(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<36>|    0.121(R)|    2.165(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<37>|    0.280(R)|    2.019(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<38>|    0.211(R)|    2.185(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<39>|    0.331(R)|    2.050(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<40>|    0.503(R)|    1.858(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<41>|   -0.057(R)|    2.426(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<42>|    0.165(R)|    2.135(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<43>|    1.436(R)|    0.965(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<44>|    0.155(R)|    2.235(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<45>|    0.034(R)|    2.345(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<46>|    0.774(R)|    1.616(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<47>|    0.222(R)|    2.130(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<48>|   -0.061(R)|    2.346(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<49>|    0.555(R)|    1.769(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<50>|    0.332(R)|    2.051(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<51>|    0.016(R)|    2.339(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<52>|   -0.083(R)|    2.385(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<53>|    0.385(R)|    2.012(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<54>|    0.516(R)|    1.854(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<55>|    1.062(R)|    1.341(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<56>|    0.034(R)|    2.353(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<57>|    0.036(R)|    2.347(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<58>|    0.274(R)|    2.050(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<59>|    0.389(R)|    2.006(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<60>|    0.263(R)|    2.065(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<61>|    0.573(R)|    1.784(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<62>|    0.429(R)|    1.973(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<63>|    0.143(R)|    2.241(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<64>|    0.039(R)|    2.237(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<65>|    0.365(R)|    2.040(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<66>|    0.644(R)|    1.694(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<67>|    2.061(R)|    0.390(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<68>|    0.042(R)|    2.350(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<69>|    0.193(R)|    2.214(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<70>|    0.603(R)|    1.775(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<71>|    0.090(R)|    2.311(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<72>|    0.984(R)|    1.419(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<73>|    0.858(R)|    1.535(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<74>|    0.149(R)|    2.213(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<75>|    0.592(R)|    1.843(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<76>|   -0.174(R)|    2.488(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<77>|    0.135(R)|    2.245(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<78>|   -0.163(R)|    2.459(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<79>|    0.663(R)|    1.697(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<80>|    0.184(R)|    2.176(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<81>|    0.119(R)|    2.231(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<82>|    0.215(R)|    2.097(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<83>|   -0.043(R)|    2.378(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<84>|    2.563(R)|   -0.011(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<85>|   -0.029(R)|    2.375(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<86>|    2.509(R)|    0.111(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<87>|    0.292(R)|    2.151(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<88>|    2.680(R)|   -0.120(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<89>|    0.273(R)|    2.166(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<90>|    2.007(R)|    0.434(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<91>|   -0.297(R)|    2.556(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<92>|   -0.082(R)|    2.460(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<93>|    0.063(R)|    2.338(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<94>|    1.822(R)|    0.600(R)|TXCLKDIV_BUFGP    |   0.000|
DATA_TO_OSERDES<95>|    0.031(R)|    2.358(R)|TXCLKDIV_BUFGP    |   0.000|
TRAINING_DONE      |    3.553(R)|    2.028(R)|TXCLKDIV_BUFGP    |   0.000|
-------------------+------------+------------+------------------+--------+

Clock TXCLK to Pad
-------------+------------+------------------+--------+
             | clk (edge) |                  | Clock  |
Destination  |   to PAD   |Internal Clock(s) | Phase  |
-------------+------------+------------------+--------+
CLOCK_TX_N   |    6.598(R)|TXCLK_BUFGP       |   0.000|
             |    6.598(F)|TXCLK_BUFGP       |   0.000|
CLOCK_TX_P   |    6.598(R)|TXCLK_BUFGP       |   0.000|
             |    6.598(F)|TXCLK_BUFGP       |   0.000|
DATA_TX_N<0> |    6.529(R)|TXCLK_BUFGP       |   0.000|
DATA_TX_N<1> |    6.513(R)|TXCLK_BUFGP       |   0.000|
DATA_TX_N<2> |    6.524(R)|TXCLK_BUFGP       |   0.000|
DATA_TX_N<3> |    6.520(R)|TXCLK_BUFGP       |   0.000|
DATA_TX_N<4> |    6.534(R)|TXCLK_BUFGP       |   0.000|
DATA_TX_N<5> |    6.516(R)|TXCLK_BUFGP       |   0.000|
DATA_TX_N<6> |    6.506(R)|TXCLK_BUFGP       |   0.000|
DATA_TX_N<7> |    6.536(R)|TXCLK_BUFGP       |   0.000|
DATA_TX_N<8> |    6.503(R)|TXCLK_BUFGP       |   0.000|
DATA_TX_N<9> |    6.517(R)|TXCLK_BUFGP       |   0.000|
DATA_TX_N<10>|    6.504(R)|TXCLK_BUFGP       |   0.000|
DATA_TX_N<11>|    6.523(R)|TXCLK_BUFGP       |   0.000|
DATA_TX_N<12>|    6.520(R)|TXCLK_BUFGP       |   0.000|
DATA_TX_N<13>|    6.515(R)|TXCLK_BUFGP       |   0.000|
DATA_TX_N<14>|    6.590(R)|TXCLK_BUFGP       |   0.000|
DATA_TX_N<15>|    6.538(R)|TXCLK_BUFGP       |   0.000|
DATA_TX_P<0> |    6.529(R)|TXCLK_BUFGP       |   0.000|
DATA_TX_P<1> |    6.513(R)|TXCLK_BUFGP       |   0.000|
DATA_TX_P<2> |    6.524(R)|TXCLK_BUFGP       |   0.000|
DATA_TX_P<3> |    6.520(R)|TXCLK_BUFGP       |   0.000|
DATA_TX_P<4> |    6.534(R)|TXCLK_BUFGP       |   0.000|
DATA_TX_P<5> |    6.516(R)|TXCLK_BUFGP       |   0.000|
DATA_TX_P<6> |    6.506(R)|TXCLK_BUFGP       |   0.000|
DATA_TX_P<7> |    6.536(R)|TXCLK_BUFGP       |   0.000|
DATA_TX_P<8> |    6.503(R)|TXCLK_BUFGP       |   0.000|
DATA_TX_P<9> |    6.517(R)|TXCLK_BUFGP       |   0.000|
DATA_TX_P<10>|    6.504(R)|TXCLK_BUFGP       |   0.000|
DATA_TX_P<11>|    6.523(R)|TXCLK_BUFGP       |   0.000|
DATA_TX_P<12>|    6.520(R)|TXCLK_BUFGP       |   0.000|
DATA_TX_P<13>|    6.515(R)|TXCLK_BUFGP       |   0.000|
DATA_TX_P<14>|    6.590(R)|TXCLK_BUFGP       |   0.000|
DATA_TX_P<15>|    6.538(R)|TXCLK_BUFGP       |   0.000|
-------------+------------+------------------+--------+

Clock to Setup on destination clock TXCLKDIV
---------------+---------+---------+---------+---------+
               | Src:Rise| Src:Fall| Src:Rise| Src:Fall|
Source Clock   |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
---------------+---------+---------+---------+---------+
TXCLKDIV       |    1.887|         |         |         |
---------------+---------+---------+---------+---------+


Analysis completed Wed Aug 20 08:59:10 2008 
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Trace Settings:
-------------------------
Trace Settings 

Peak Memory Usage: 251 MB