📄 ddr_6to1_16chan_rt_rx.twr
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Release 10.1.02 Trace (nt)
Copyright (c) 1995-2008 Xilinx, Inc. All rights reserved.
K:\Xilinx\10.1\ISE\bin\nt\unwrapped\trce.exe -ise
E:/ISEworks/LVDS/LVDS_4to1/xapp860.ise -intstyle ise -v 3 -s 1 -xml
DDR_6TO1_16CHAN_RT_RX DDR_6TO1_16CHAN_RT_RX.ncd -o DDR_6TO1_16CHAN_RT_RX.twr
DDR_6TO1_16CHAN_RT_RX.pcf -ucf lvds_tx_rx_merge.ucf
Design file: DDR_6TO1_16CHAN_RT_RX.ncd
Physical constraint file: DDR_6TO1_16CHAN_RT_RX.pcf
Device,package,speed: xc5vsx50t,ff1136,-1 (PRODUCTION 1.61 2008-05-28, STEPPING level 0)
Report level: verbose report
Environment Variable Effect
-------------------- ------
NONE No environment variables were set
--------------------------------------------------------------------------------
INFO:Timing:2698 - No timing constraints found, doing default enumeration.
INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths
option. All paths that are not constrained will be reported in the
unconstrained paths section(s) of the report.
INFO:Timing:3339 - The clock-to-out numbers in this timing report are based on
a 50 Ohm transmission line loading model. For the details of this model,
and for more information on accounting for different loading conditions,
please see the device datasheet.
Data Sheet report:
-----------------
All values displayed in nanoseconds (ns)
Setup/Hold to clock CLOCK_RX_N
-----------------+------------+------------+------------------+--------+
| Setup to | Hold to | | Clock |
Source | clk (edge) | clk (edge) |Internal Clock(s) | Phase |
-----------------+------------+------------+------------------+--------+
BITSLIP_PAD | 0.708(R)| 0.820(R)|RXCLKDIV_OBUF | 0.000|
DATA_RX_N<0> | -0.976(R)| 1.484(R)|RXCLK_TEMP | 0.000|
| -0.976(F)| 1.484(F)|RXCLK_TEMP | 0.000|
DATA_RX_N<1> | -1.021(R)| 1.547(R)|RXCLK_TEMP | 0.000|
| -1.021(F)| 1.547(F)|RXCLK_TEMP | 0.000|
DATA_RX_N<2> | -0.963(R)| 1.432(R)|RXCLK_TEMP | 0.000|
| -0.963(F)| 1.432(F)|RXCLK_TEMP | 0.000|
DATA_RX_N<3> | -0.965(R)| 1.474(R)|RXCLK_TEMP | 0.000|
| -0.965(F)| 1.474(F)|RXCLK_TEMP | 0.000|
DATA_RX_N<4> | -0.929(R)| 1.454(R)|RXCLK_TEMP | 0.000|
| -0.929(F)| 1.454(F)|RXCLK_TEMP | 0.000|
DATA_RX_N<5> | -0.986(R)| 1.488(R)|RXCLK_TEMP | 0.000|
| -0.986(F)| 1.488(F)|RXCLK_TEMP | 0.000|
DATA_RX_N<6> | -0.936(R)| 1.392(R)|RXCLK_TEMP | 0.000|
| -0.936(F)| 1.392(F)|RXCLK_TEMP | 0.000|
DATA_RX_N<7> | -1.010(R)| 1.521(R)|RXCLK_TEMP | 0.000|
| -1.010(F)| 1.521(F)|RXCLK_TEMP | 0.000|
DATA_RX_N<8> | -0.969(R)| 1.448(R)|RXCLK_TEMP | 0.000|
| -0.969(F)| 1.448(F)|RXCLK_TEMP | 0.000|
DATA_RX_N<9> | -0.962(R)| 1.487(R)|RXCLK_TEMP | 0.000|
| -0.962(F)| 1.487(F)|RXCLK_TEMP | 0.000|
DATA_RX_N<10> | -1.024(R)| 1.542(R)|RXCLK_TEMP | 0.000|
| -1.024(F)| 1.542(F)|RXCLK_TEMP | 0.000|
DATA_RX_N<11> | -0.956(R)| 1.449(R)|RXCLK_TEMP | 0.000|
| -0.956(F)| 1.449(F)|RXCLK_TEMP | 0.000|
DATA_RX_N<12> | -0.907(R)| 1.377(R)|RXCLK_TEMP | 0.000|
| -0.907(F)| 1.377(F)|RXCLK_TEMP | 0.000|
DATA_RX_N<13> | -0.937(R)| 1.422(R)|RXCLK_TEMP | 0.000|
| -0.937(F)| 1.422(F)|RXCLK_TEMP | 0.000|
DATA_RX_N<14> | -1.016(R)| 1.534(R)|RXCLK_TEMP | 0.000|
| -1.016(F)| 1.534(F)|RXCLK_TEMP | 0.000|
DATA_RX_N<15> | -0.943(R)| 1.450(R)|RXCLK_TEMP | 0.000|
| -0.943(F)| 1.450(F)|RXCLK_TEMP | 0.000|
DATA_RX_N<16> | -0.951(R)| 1.450(R)|RXCLK_TEMP | 0.000|
| -0.951(F)| 1.450(F)|RXCLK_TEMP | 0.000|
DATA_RX_P<0> | -0.976(R)| 1.484(R)|RXCLK_TEMP | 0.000|
| -0.976(F)| 1.484(F)|RXCLK_TEMP | 0.000|
DATA_RX_P<1> | -1.021(R)| 1.547(R)|RXCLK_TEMP | 0.000|
| -1.021(F)| 1.547(F)|RXCLK_TEMP | 0.000|
DATA_RX_P<2> | -0.963(R)| 1.432(R)|RXCLK_TEMP | 0.000|
| -0.963(F)| 1.432(F)|RXCLK_TEMP | 0.000|
DATA_RX_P<3> | -0.965(R)| 1.474(R)|RXCLK_TEMP | 0.000|
| -0.965(F)| 1.474(F)|RXCLK_TEMP | 0.000|
DATA_RX_P<4> | -0.929(R)| 1.454(R)|RXCLK_TEMP | 0.000|
| -0.929(F)| 1.454(F)|RXCLK_TEMP | 0.000|
DATA_RX_P<5> | -0.986(R)| 1.488(R)|RXCLK_TEMP | 0.000|
| -0.986(F)| 1.488(F)|RXCLK_TEMP | 0.000|
DATA_RX_P<6> | -0.936(R)| 1.392(R)|RXCLK_TEMP | 0.000|
| -0.936(F)| 1.392(F)|RXCLK_TEMP | 0.000|
DATA_RX_P<7> | -1.010(R)| 1.521(R)|RXCLK_TEMP | 0.000|
| -1.010(F)| 1.521(F)|RXCLK_TEMP | 0.000|
DATA_RX_P<8> | -0.969(R)| 1.448(R)|RXCLK_TEMP | 0.000|
| -0.969(F)| 1.448(F)|RXCLK_TEMP | 0.000|
DATA_RX_P<9> | -0.962(R)| 1.487(R)|RXCLK_TEMP | 0.000|
| -0.962(F)| 1.487(F)|RXCLK_TEMP | 0.000|
DATA_RX_P<10> | -1.024(R)| 1.542(R)|RXCLK_TEMP | 0.000|
| -1.024(F)| 1.542(F)|RXCLK_TEMP | 0.000|
DATA_RX_P<11> | -0.956(R)| 1.449(R)|RXCLK_TEMP | 0.000|
| -0.956(F)| 1.449(F)|RXCLK_TEMP | 0.000|
DATA_RX_P<12> | -0.907(R)| 1.377(R)|RXCLK_TEMP | 0.000|
| -0.907(F)| 1.377(F)|RXCLK_TEMP | 0.000|
DATA_RX_P<13> | -0.937(R)| 1.422(R)|RXCLK_TEMP | 0.000|
| -0.937(F)| 1.422(F)|RXCLK_TEMP | 0.000|
DATA_RX_P<14> | -1.016(R)| 1.534(R)|RXCLK_TEMP | 0.000|
| -1.016(F)| 1.534(F)|RXCLK_TEMP | 0.000|
DATA_RX_P<15> | -0.943(R)| 1.450(R)|RXCLK_TEMP | 0.000|
| -0.943(F)| 1.450(F)|RXCLK_TEMP | 0.000|
DATA_RX_P<16> | -0.951(R)| 1.450(R)|RXCLK_TEMP | 0.000|
| -0.951(F)| 1.450(F)|RXCLK_TEMP | 0.000|
DEC_PAD | -0.919(R)| 1.987(R)|RXCLKDIV_OBUF | 0.000|
IDLY_RESET | 2.391(R)| -0.251(R)|RXCLKDIV_OBUF | 0.000|
INC_PAD | -0.861(R)| 1.820(R)|RXCLKDIV_OBUF | 0.000|
RESET | 4.561(R)| -0.139(R)|RXCLKDIV_OBUF | 0.000|
RT_MANUAL_DISABLE| 1.261(R)| -0.148(R)|RXCLKDIV_OBUF | 0.000|
-----------------+------------+------------+------------------+--------+
Setup/Hold to clock CLOCK_RX_P
-----------------+------------+------------+------------------+--------+
| Setup to | Hold to | | Clock |
Source | clk (edge) | clk (edge) |Internal Clock(s) | Phase |
-----------------+------------+------------+------------------+--------+
BITSLIP_PAD | 0.708(R)| 0.820(R)|RXCLKDIV_OBUF | 0.000|
DATA_RX_N<0> | -0.976(R)| 1.484(R)|RXCLK_TEMP | 0.000|
| -0.976(F)| 1.484(F)|RXCLK_TEMP | 0.000|
DATA_RX_N<1> | -1.021(R)| 1.547(R)|RXCLK_TEMP | 0.000|
| -1.021(F)| 1.547(F)|RXCLK_TEMP | 0.000|
DATA_RX_N<2> | -0.963(R)| 1.432(R)|RXCLK_TEMP | 0.000|
| -0.963(F)| 1.432(F)|RXCLK_TEMP | 0.000|
DATA_RX_N<3> | -0.965(R)| 1.474(R)|RXCLK_TEMP | 0.000|
| -0.965(F)| 1.474(F)|RXCLK_TEMP | 0.000|
DATA_RX_N<4> | -0.929(R)| 1.454(R)|RXCLK_TEMP | 0.000|
| -0.929(F)| 1.454(F)|RXCLK_TEMP | 0.000|
DATA_RX_N<5> | -0.986(R)| 1.488(R)|RXCLK_TEMP | 0.000|
| -0.986(F)| 1.488(F)|RXCLK_TEMP | 0.000|
DATA_RX_N<6> | -0.936(R)| 1.392(R)|RXCLK_TEMP | 0.000|
| -0.936(F)| 1.392(F)|RXCLK_TEMP | 0.000|
DATA_RX_N<7> | -1.010(R)| 1.521(R)|RXCLK_TEMP | 0.000|
| -1.010(F)| 1.521(F)|RXCLK_TEMP | 0.000|
DATA_RX_N<8> | -0.969(R)| 1.448(R)|RXCLK_TEMP | 0.000|
| -0.969(F)| 1.448(F)|RXCLK_TEMP | 0.000|
DATA_RX_N<9> | -0.962(R)| 1.487(R)|RXCLK_TEMP | 0.000|
| -0.962(F)| 1.487(F)|RXCLK_TEMP | 0.000|
DATA_RX_N<10> | -1.024(R)| 1.542(R)|RXCLK_TEMP | 0.000|
| -1.024(F)| 1.542(F)|RXCLK_TEMP | 0.000|
DATA_RX_N<11> | -0.956(R)| 1.449(R)|RXCLK_TEMP | 0.000|
| -0.956(F)| 1.449(F)|RXCLK_TEMP | 0.000|
DATA_RX_N<12> | -0.907(R)| 1.377(R)|RXCLK_TEMP | 0.000|
| -0.907(F)| 1.377(F)|RXCLK_TEMP | 0.000|
DATA_RX_N<13> | -0.937(R)| 1.422(R)|RXCLK_TEMP | 0.000|
| -0.937(F)| 1.422(F)|RXCLK_TEMP | 0.000|
DATA_RX_N<14> | -1.016(R)| 1.534(R)|RXCLK_TEMP | 0.000|
| -1.016(F)| 1.534(F)|RXCLK_TEMP | 0.000|
DATA_RX_N<15> | -0.943(R)| 1.450(R)|RXCLK_TEMP | 0.000|
| -0.943(F)| 1.450(F)|RXCLK_TEMP | 0.000|
DATA_RX_N<16> | -0.951(R)| 1.450(R)|RXCLK_TEMP | 0.000|
| -0.951(F)| 1.450(F)|RXCLK_TEMP | 0.000|
DATA_RX_P<0> | -0.976(R)| 1.484(R)|RXCLK_TEMP | 0.000|
| -0.976(F)| 1.484(F)|RXCLK_TEMP | 0.000|
DATA_RX_P<1> | -1.021(R)| 1.547(R)|RXCLK_TEMP | 0.000|
| -1.021(F)| 1.547(F)|RXCLK_TEMP | 0.000|
DATA_RX_P<2> | -0.963(R)| 1.432(R)|RXCLK_TEMP | 0.000|
| -0.963(F)| 1.432(F)|RXCLK_TEMP | 0.000|
DATA_RX_P<3> | -0.965(R)| 1.474(R)|RXCLK_TEMP | 0.000|
| -0.965(F)| 1.474(F)|RXCLK_TEMP | 0.000|
DATA_RX_P<4> | -0.929(R)| 1.454(R)|RXCLK_TEMP | 0.000|
| -0.929(F)| 1.454(F)|RXCLK_TEMP | 0.000|
DATA_RX_P<5> | -0.986(R)| 1.488(R)|RXCLK_TEMP | 0.000|
| -0.986(F)| 1.488(F)|RXCLK_TEMP | 0.000|
DATA_RX_P<6> | -0.936(R)| 1.392(R)|RXCLK_TEMP | 0.000|
| -0.936(F)| 1.392(F)|RXCLK_TEMP | 0.000|
DATA_RX_P<7> | -1.010(R)| 1.521(R)|RXCLK_TEMP | 0.000|
| -1.010(F)| 1.521(F)|RXCLK_TEMP | 0.000|
DATA_RX_P<8> | -0.969(R)| 1.448(R)|RXCLK_TEMP | 0.000|
| -0.969(F)| 1.448(F)|RXCLK_TEMP | 0.000|
DATA_RX_P<9> | -0.962(R)| 1.487(R)|RXCLK_TEMP | 0.000|
| -0.962(F)| 1.487(F)|RXCLK_TEMP | 0.000|
DATA_RX_P<10> | -1.024(R)| 1.542(R)|RXCLK_TEMP | 0.000|
| -1.024(F)| 1.542(F)|RXCLK_TEMP | 0.000|
DATA_RX_P<11> | -0.956(R)| 1.449(R)|RXCLK_TEMP | 0.000|
| -0.956(F)| 1.449(F)|RXCLK_TEMP | 0.000|
DATA_RX_P<12> | -0.907(R)| 1.377(R)|RXCLK_TEMP | 0.000|
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