lvds_bist_top.xst

FPGA之间的LVDS传输

set -tmpdir "E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/xst/projnav.tmp"
set -xsthdpdir "E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/xst"
run
-ifn lvds_bist_top.prj
-ifmt mixed
-ofn lvds_bist_top
-ofmt NGC
-p xc5vfx130t-1-ff1738
-top lvds_bist_top
-opt_mode Speed
-opt_level 1
-power NO
-iuc NO
-lso lvds_bist_top.lso
-keep_hierarchy YES
-netlist_hierarchy as_optimized
-rtlview Yes
-glob_opt AllClockNets
-read_cores YES
-write_timing_constraints NO
-cross_clock_analysis NO
-hierarchy_separator /
-bus_delimiter <>
-case maintain
-slice_utilization_ratio 100
-bram_utilization_ratio 100
-dsp_utilization_ratio 100
-lc off
-reduce_control_sets off
-verilog2001 YES
-fsm_extract YES -fsm_encoding Auto
-safe_implementation No
-fsm_style lut
-ram_extract Yes
-ram_style Auto
-rom_extract Yes
-mux_style Auto
-decoder_extract YES
-priority_extract YES
-shreg_extract YES
-shift_extract YES
-xor_collapse YES
-rom_style Auto
-auto_bram_packing NO
-mux_extract YES
-resource_sharing YES
-async_to_sync NO
-use_dsp48 auto
-iobuf YES
-max_fanout 100000
-bufg 32
-register_duplication YES
-register_balancing No
-slice_packing YES
-optimize_primitives NO
-use_clock_enable Auto
-use_sync_set Auto
-use_sync_reset Auto
-iob auto
-equivalent_register_removal YES
-slice_utilization_ratio_maxmargin 5